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| 主题：以 Flash 为基础的FPGA实现高度安全的设计 | ||
| 在线问答： | ||
| [问：wxis] | 使用apa300中的异步FIFO（16bits宽，深度为256，检测深度为16）时，同步写60M的时钟，外部cpu用2M左右频率的异步读。在使用它读大量的数据时时，出现前16个数据有时是乱的，后面的数据位置前移但没有错误，问可能是什么原因造成的？布局布线后，时间分析器的结果是满足频率要求的。 | |
| [答：Albert] | It might due to insufficient setup/hold time at the FIFO interface | [2005-12-20 10:37:05] |
| [问：singer533] | 以Flash为基础的FPGA是否不需要上电配置? | |
| [答：HuQin] | 是的,不需要上电配置,因为FPGA的逻辑配置和布线资源都是用Flash来实现的,即使掉了电,这些配置信息还是在的,所以上电以后完全没有加载过程 | [2005-12-20 10:37:27] |
| [问：excalibur828] | 您好： 我以前一直使用altera的FPGA做设计，altera和xilinx都有对应的可综合的soft软核的部分，actel公司也从ARM得到ARM7的授权，不知道这个部分的ARM7的核，我是只要使用ACTEL的FPGA就可以使用，还是局限于某些器件。同时我需要什么费用码？？ | |
| [答：Dawson] | 您只要使用我们的M7系列的器件就可以免费使用ARM7TDMIS版本的软核,M7系列的结构同于PROASIC3/E系列 | [2005-12-20 10:37:52] |
| [问：32kmcu] | 我使用的是M7A3PE600,感觉很不错.但是你们的IDE无法生成可下载代码,这对我造成很大不便,请问如何可以得到这个功能? | |
| [答：Albert] | MP7A3PE600 requires Platinum version of Libero, which is not free. Please contact our distributor FAE for help! | [2005-12-20 10:37:54] |
| [问：llu_1976] | 常见的硬件盗版技术有哪些?在防复制防破译方面,actel如何处理的? | |
| [答：Albert] | Clone and reverse engineering. Actel"s anti-fuse and Flash based FPGAs can protect against these two kinds of attacks | [2005-12-20 10:38:46] |
| [问：Mr Wei] | 你们的保密性真的是没的说啊,是用VHDL语言开发吗? | |
| [答：Albert] | We can support both VHDL or Verilog (but not in the same project). | [2005-12-20 10:39:32] |
| [问：chpzmax] | 使用你们提供的IP核还要收取相应的费用吗？ | |
| [答：Dawson] | 关于费用问题,请联系我们的代理:Lacewood,Avnet,Secom | [2005-12-20 10:40:44] |
| [问：都市劣人] | 能否介绍一下flash fpga相对于sram fpga的弱势表现在哪里？ | |
| [答：Albert] | Frankly speaking, I can"t think of any weakness about Flash based FPGA, whatever SRAM FPGA can do, Flash based FPGA can too. | [2005-12-20 10:40:58] |
| [问：32kmcu] | ＡＥＳ密钥信息遗失是否意味着当无法寻回密钥时，此芯片不允许任何更改？不再支持任何后续读写？ | |
| [答：Albert] | No, even Actel can"t recover it! That"s due to the high security protection feature. | [2005-12-20 10:42:36] |
| [问：llu_1976] | 好像基于flash的fpga没有容量小的,这个不方便我们产品使用,性价比不佳 | |
| [答：Albert] | We do have a smaller device! For ProASIC3 family we have A3P030, which is similar to CPLD in capacity but offers a lot more features! | [2005-12-20 10:43:41] |
| [问：hzj515] | SRAM-FPGA构成自动控制系统还需要CPU芯片和执行器件吗？开发软件费用高吗？ | |
| [答：HuQin] | 您这边问的是FLASH-FPGA吗?今天我们演讲的主题是FLASH-FPGA,如果您用FLASH-FPGA构成自动控制系统的话,就不需要用于上电以后执行加载CPU芯片或者CPLD,以及存储配置文件的E2PROM; 软件的话,我们的GOLD版本的license在网上可以免费申请,其他一些具体的需求您可以找我们代理联系,AVNET,SECOM,LACEWOOD | [2005-12-20 10:44:19] |
| [问：杨门] | 使用FPGA怎样设置密码保护，以保护源程序的安全？ | |
| [答：Albert] | Please refer to the presentation for the detailed procedures for setting up the security key. | [2005-12-20 10:45:10] |
| [问：zhx771013] | 他的开发软件及硬件连接工具 | |
| [答：Albert] | I"m sorry, I don"t understand your question | [2005-12-20 10:45:56] |
| [问：singer533] | 此种类型的FPGA目前容量有多大?是否可达到SRAM配置FPGA的水平? | |
| [答：HuQin] | 目前我们第三代flash技术的FPGA,的最大容量是300万门. 跟Xilinx和Altera 的高端的SRAM-FPGA 相比在容量上还有一些差距,在我们的第4代里容量还会上去 | [2005-12-20 10:45:56] |
| [问：32kmcu] | 目前在Actel CoreConsole 1.0中是否有新的片内外设？如果以后增加片内外设，该到何处搜索资源？ | |
| [答：Albert] | Yes, we have some built in periperal in CoreConsole, and will be increased in the future. As we also support 3-rd party IPs, so the price will depends on these companies | [2005-12-20 10:47:08] |
| [问：happychen36] | 基于FLASH和SRAM的FPGA的根本区别是什么 | |
| [答：Dawson] | 从技术结构上看,FLASH的FPGA的可编程开关单元是基于FLASH的技术,SRAM的FPGA的可编程开关单元是基于SRAM的技术.从外在表现看,由于FLASH开关是掉电非易失的而SRAM开关是掉电易失的,所以FLASH的FPGA有如下的特点:掉电非易失,单芯片,不需要配置芯片,不需要每次上电都要配置,没有上电配置电流,高加密性,高可靠性,低功耗. | [2005-12-20 10:47:17] |
| [问：microlingo] | 是否有開發kid ? how much?how to buy ? | |
| [答：HuQin] | 有开发工具包,大概在3,4百美金左右--也有可能不到,具体您可以向我们的代理AVnet,SECOM,LACEWOOD 联系,谢谢 :) | [2005-12-20 10:47:27] |
| [问：wxis] | 使用Actel的proASIC3，可以免费获得ARM7DMIS版本的软核吗？ | |
| [答：Albert] | There is no license fee for Actel ARM core, we charge for the silicon only! | [2005-12-20 10:48:51] |
| [问：heike0107] | 加密过后的片子就连贵公司的研发人员都不能将程序读出来吗?? | |
| [答：Albert] | That"s right | [2005-12-20 10:48:59] |
| [问：32kmcu] | 在M7A3PE600中,我将几个BANK使用不同的IO电压,为了降低功耗,我将其中的一个或者多的BANK在设备工作中断电和恢复供电,是否允许?有何特别需要注意地方? | |
| [答：Albert] | This feature is not supported. But you can set the output buffers to have low driving strength and low slew rate to reduce the I/O power consumption. For input, all CMOS type inputs consume very little power. | [2005-12-20 10:50:48] |
| [问：pfmdd] | CoreMP7也具有以上的密钥? | |
| [答：Albert] | Currently, the key is preserved for the protection of ARM. In the future, we will support dual AES key in MP7 family to support both user and ARM7 protection | [2005-12-20 10:52:29] |
| [问：kandyliuy] | Does this mean the configuration data is downloaded into a flash memory instead of a sram? | |
| [答：Albert] | Yes | [2005-12-20 10:52:48] |
| [问：glarecui] | 贵公司所说的，FPGA成为系统设计的主体，是否意味着可以不再需要配合其它MPU使用就可完成MPU的功能包括嵌入式系统的使用？ | |
| [答：Albert] | Yes, such as our latest product called Fusion, it is actaully a SOC product, can integrate MPU flash RAM and even analog components! | [2005-12-20 10:54:06] |
| [问：fcr] | A3P和A3E的区别是什么？IO是否5V tolerant | |
| [答：Albert] | A3PE series has more PLL, supports more I/O standards, more RAM and logic resources. The input can tolerate 5V with an external resistor/diode | [2005-12-20 10:55:13] |
| [问：crazycake] | Actel的FlashFPGA在成本方面能否超越ASIC?或者在今后的什么时候能够降低到跟ASIC差不多？ | |
| [答：HuQin] | 嗯,这个问题比较难回答,在量少的情况下,单纯从单片价格上看,flash-FPGA可能还是会比ASIC高一些,但是如果我们从FPGA的重复可编程性(可以及时更新设计),没有NRE费用,研发周期短(如果作ASIC的话,需要一个很长的开发周期,而且大型ASIC设计还有一定的风险性,也许等ASIC出来,可能机会窗都已经过去了)这些方面来看,flash-fpga还是会有优势.但是如果量大的话,flash-fpga单片价格也会比ASIC有优势,更不用说flash-fpga还有上面我们提到过的好处.我们第三代flash fpga有10种器件在一定量的时候单价可以在10个美元以下.A3P030在100K采购量的情况下,是1.5个美金.具体情况您可以向我们的代理avnet,secom,lacewood,联系,谢谢 | [2005-12-20 10:56:13] |
| [问：sc515] | 恳请讲一下FPGA的发展历程及其应用研发未来走向,谢谢! | |
| [答：Albert] | From glue logic to system core, now becomes SoC! | [2005-12-20 10:56:45] |
| [问：ypqecum] | 在家电上有何应用？ | |
| [答：HuQin] | 机顶盒等需要加密,或者高端信息家电,如果需要提供一些个性化服务,以及对安全性和可靠性有要求的应用都可以 | [2005-12-20 10:57:25] |
| [问：gq_300] | FPGA与CPLD的主要区别，在实际应用中怎么选择？ | |
| [答：Dawson] | 主要是从应用来区别,一般说来,CPLD主要做一些简单的控制逻辑,如板上的上电顺序的控制,MCU于外设的译码控制逻辑等要求上电就工作的逻辑应用;而传统的SRAM FPGA做容量更大一些的逻辑,有PLL,嵌入的SRAM块等CPLD没有的资源,但有掉电易失的特点.但随作技术的发展,现在看FPGA和CPLD的区分界限越来越不明显,比如我们的PROASIC3/E由于是FLASH工艺的FPGA,所以具有CPLD的掉电非易失的特点,单芯片,但内部又是FPGA的逻辑结构(有PLL,嵌入的SRAM块,支持高速的差分IO等),而且逻辑容量范围很广,小的到3万门(768个逻辑块,大约相当于300个宏单元左右),大到300万门. | [2005-12-20 10:57:51] |
| [问：kingsword] | FPGA的配置是如何实现保密的呢? | |
| [答：Albert] | For Actel flash based FPGA, we use encryption to protect the programming file and unauthorized read from the FPGA | [2005-12-20 10:57:53] |
| [问：32kmcu] | Actel CoreConsole 1.0目前只支持ＶＥＲＩＬＯＧ，支持ＶＨＤＬ的版本将何时推出？ | |
| [答：Albert] | Will suppoort both very soon, please stay tuned! | [2005-12-20 10:58:38] |
| [问：polymorph] | 我以前用的是SRAM 类FPGA,现在要过度到Flash FPGA,应用程序是否可以直接替换?设计工具是否兼容? | |
| [答：Albert] | If your design is in VHDL/Verilog, all you need to do is to resynthesize your design. Our synthesis tool is Synplify, similation tool is ModelSim, they are the most popular EDA tools in the market, so I believe you are familiar with them already | [2005-12-20 11:00:40] |
| [问：wang_3130] | actel最小的CPLD系列是什么型号的，大概多少门？ | |
| [答：HuQin] | 我们第三代FLASH fpga的最小型号是A3P030,容量大概有3万门,有700多个触发器---FPGA的资源,比CPLD可能还要便宜的价格;除此之外我们还有EX系列反融丝的CPLD, ex-64 有64个宏单元.谢谢 | [2005-12-20 11:00:57] |
| [问：Wellsian] | 我不懂FPGA，对MCU及DSP较熟，有朋友希望我用FPGA为他做一个广告灯的控制，请问我需要做哪准备工作？ | |
| [答：Albert] | You can buy a ProASIC3 starter kit from our distributor, and our FAE can provide you a basic training | [2005-12-20 11:01:31] |
| [问：llu_1976] | 我们采用过otp技术的cpld,但生产成本太高,调试困难,采购周期,坏片率,生产设备,烧写时间等因素制约了产品上规模,只能放弃,基于flash的cpld从以上角度有哪些改进呢? | |
| [答：Dawson] | 我不确定您所说的OTP技术是否是指ANTIFUSE技术.由于antifuse的FPGA的技术特点决定了它需要使用专用的编程器编程,不支持在线升级的功能,但它有高可靠性,高加密性,低功耗的优点. FLASH的FPGA由于基于FLASH的工艺,所以支持ISP功能(在系统升级) | [2005-12-20 11:02:43] |
| [问：32kmcu] | M7A3PE600的IO可以跑到350MHZ?那么使用DDR时,是否可以实现700Mb？ | |
| [答：Dawson] | 是 | [2005-12-20 11:02:57] |
| [问：crazycake] | 那我们可以用你们的FPGA来完全替代CPU？你们最高的频率现在能到多少？ | |
| [答：Albert] | Yes! We support different type of MPU, which one are you interested in? | [2005-12-20 11:03:08] |
| [问：tianshan1] | 从安全设计来考虑,我们应该选择Actel的反熔丝FPGA还是Flash FPGA?理由是什么? | |
| [答：Albert] | In fact the security provided by Flash and anti-fuse based FPGA are very very close. Anti-fuse is a little bit better than flash, but Flash is reprogrammable... So it is hard to tell. | [2005-12-20 11:04:44] |
| [问：chinesesopc] | 请介绍一下能内嵌ARM7核的M7系列FPGA在国内那有卖的？谢谢 | |
| [答：Dawson] | 可以跟我们代理联系,谢谢! Lacewood(www.maxtek-icrep.com.tw),Avnet,Secom | [2005-12-20 11:04:52] |
| [问：shu_chen] | 请问在做数字信号处理算法时，基于Flash的FPGA在时序控制上是不是比基于SRAM的麻烦？ | |
| [答：HuQin] | 嗯,这个倒是不会,只是在某些高端SRAM的FPGA里有专用的乘法器,所以在作某些算法的时候性能和资源比较有优势.单纯从逻辑电路来讲,都是一样的.目前我们的第三代flash fpga 用于实现一些性能要求不是特别高的DSP算法完全没有问题.我们以后也会推出有专用DSP部件的flash - FPGA | [2005-12-20 11:05:32] |
| [问：wxis] | 如何获得 Actel coreConsole 1。0，它是打包在开发软件集里面的吗？ | |
| [答：Albert] | You can download it from Actel website. Currently, it is not included in Libero IDE. You need to download it separately | [2005-12-20 11:06:03] |
| [问：ecnanjing_EBY7E] | 永久锁一旦被设置,是否设计者自己都不能改了? | |
| [答：Albert] | Yes, once permanent lock is turn-on it acts like an ASIC, no one can change it! | [2005-12-20 11:06:33] |
| [问：32kmcu] | 在M7A3PE600中是否可以将部分资源重新配置更新? | |
| [答：Albert] | Can you explain your question in more detail please? | [2005-12-20 11:06:55] |
| [问：leaders] | Actel 都提供哪些IP Core，用户可以免费使用吗？ | |
| [答：Albert] | We offer more than 90 different IPs and is increasing almost every day, so it is difficult to list out all of them here. Please visit our corporate website, and will be see a detailed list of all our IPs and the IPs offered by our 3-rd party partners | [2005-12-20 11:08:09] |
| [问：yb97lt] | FPGA设计的安全性和ASIC的安全相比,有什么不足?能超过ASIC或旗鼓相当吗? | |
| [答：HuQin] | 感觉FLASH-FPGA (不是SRAM-FPGA)的安全性比ASIC的安全性还要高--ASIC还有作反向工程被破解的俗称"扒片子",FLASH-FPGA因为结构和技术的原因,作反向工程也没用. 而且FLASH-FPGA 能提供ASIC不能提供的灵活性. | [2005-12-20 11:08:16] |
| [问：老发] | 学习使用你们的FPGA要具备什么样的基础？ | |
| [答：Dawson] | 有一定的数字逻辑电路基础,您也可联系我们代理的ACTEL技术支持:Avnet(www.avnet.com),Lacewood(www.maxtek-icrep.com.tw),Secom(www.secomtel.com) | [2005-12-20 11:08:33] |
| [问：ANDYZZ2006] | 目前使用APA150,LAYOUT一次的時間約15分鐘(用P4 3.0),進入第三代,LAYOUT時間是否有改進一些? | |
| [答：Albert] | We are putting effort in reducing the P&R time, you will see improvement in the future release of our software. In fact, due to the architectural change in ProASIC3, the P&R has been reduced! | [2005-12-20 11:09:26] |
| [问：glarecui] | 有没有应用嵌入是系统的例子？谢谢 | |
| [答：Albert] | We already have embedded application customers using our APA products. But I"m sorry that I can release their name, you may give us a call and we can discuss it in more detail | [2005-12-20 11:10:39] |
| [问：ecnanjing_EBY7E] | MAC检查解密是否会消耗运行时间? | |
| [答：Albert] | No, it won"t. The security checking is only done during the programming and access to the FPGA"s content. During normal operation of the FPGA, the MAC module is not active. | [2005-12-20 11:11:57] |
| [问：polymorph] | 能否介绍APA150的安全保密功能以及所采用的加米算法? | |
| [答：Albert] | APA150 also supports FlashLock feature. Its security key is 79 bits long. | [2005-12-20 11:13:33] |
| [问：zhangyao518] | 如何通过对FPGA配置bitstream进行加密，防止设计偷盗行为? | |
| [答：Albert] | You can turn on the security key before generating the programming file. For details, please refer to today"s presentation. | [2005-12-20 11:14:17] |
| [问：fy_zhu] | 就FPGA的技术, SRAM型,反熔絲型和Flash型,那种FPGA的安全性最高?成本呢? | |
| [答：Dawson] | Antifuse和Flash的FPGA的安全性很高,Antifuse又比Flash的FPGA的安全性要高,SRAM的FPGA安全性相当弱,不可能应用在需要保护您的知识产权的应用中去.关于成本方面,ANTIFUSE的系列较多,有面向不同领域的市场,也有很低成本的产品,如EX系列.Flash的FPGA特别是第三代的Proasic3/e系列在具备一切Flash技术的优点的同时,也在对价格敏感的市场应用领域很有竞争力.具体价格可联系我们的代理. | [2005-12-20 11:15:15] |
| [问：tianshan1] | FPGA在汽车电子应用中, FPGA设计工具基本上都是单芯片，但FPGA硬件设计工具与嵌入式软件工具是分开的,有没有综合性的开发工具,支持多种体系的FPGA结构,方便开发? | |
| [答：Albert] | Currently we don"t include the software development platform into the FPGA IDE, we are considering to do so. You input is valuable to us! | [2005-12-20 11:15:38] |
| [问：fy_zhu] | 能否比较一下,FPGA中的IP安全性和数据性的差别和防范措施? | |
| [答：HuQin] | 您是问SRAM-FPGA和FLASH-FPGA在这两方的差别吗?还是单问在FLASH-FPGA这两方面的差别.如果是基于Actel的FLASH FPGA,对于的IP安全性,ProAsic3 FPGA提供诸多安全选项完全可以给你提供足够的安全性--而且您还可以定制.数据安全--如果您的数据只是内部使用的话而且不大的话,可以用内嵌的flash-rom,安全性也没有问题.如果您的数据是从FPGA外部送给FPGA的话,可以考虑送数据的时候用加密算法进行加密,然后在FPGA内部进行解密.如果是FPGA送出数据的话,那么可能需要在FPGA用加密算法对数据进行加密后输出,接收端进行解密 | [2005-12-20 11:17:01] |
| [问：polymorph] | 你认为,如何提高SRAM FPGA的安全性? | |
| [答：Albert] | SRAM FPGA is not secure in nature, it is no effective way to increase the security of SRAM based FPGA. Or the solution is very expensive and cumbersome. | [2005-12-20 11:17:34] |
| [问：fy_zhu] | FPGA和CPLD在应用上最大的区别是什么？从设计方法和安全性上有何差别? | |
| [答：Albert] | CPLD has less logic than FPGA, for modern EDA tools, the developlment methodology is virtually no different. | [2005-12-20 11:18:51] |
| [问：tianshan1] | 在FPGA设计时, 如何提高母片利用率？提高安全性是否会降低母片利用率？ | |
| [答：Dawson] | 我不太理解您的母片是指什么?Wafer? 我们的安全性是Flash技术所带来的特点,AES是我们安全性的增强,主要是对编程(包括远程升级)的保护. | [2005-12-20 11:19:16] |
| [问：brownbenson] | FPGA在防窜改技术,特别是汽车远程信息处理系统上有何独到之处?在这方面,Flash和反熔丝FPGA那个较好? | |
| [答：Albert] | Flash based FPGA offers the flexibility and yet still can be reprogrammed by the manufacturer with security protection. Antifuse has wider temperature range, but makes no different in automotive applications. So I would say both anti-fuse and flash based FPGAs are equally good for automotive applications | [2005-12-20 11:21:09] |
| [问：brownbenson] | Flash FPGA经128位加密后,FPGA的利用率是否会降低?大约是多少? | |
| [答：HuQin] | 不会降低,因为flash fpga的加密是这样实现的,在fpga内部有个AES-128 解密电路,在用经过加密后的配置文件对FPGA进行编程时,解密电路会先对配置文件进行解密然后在编程,跟没有加密的FPGA编程相比,只是先用解密电路对配置文件进行了解密而已---不加密的fgap编程在编程时解密电路被旁路掉了,所以对FPGA的利用率完全没有影响. | [2005-12-20 11:21:10] |
| [问：youyubing] | Actel的Flash FPGA是否提供网络接口功能模块软核？ | |
| [答：HuQin] | 可以提供 | [2005-12-20 11:21:32] |
| [问：ecnanjing_EBY7E] | 内置电荷泵会不会产生浪涌电流? | |
| [答：Albert] | No, it won"t. | [2005-12-20 11:21:54] |
| [问：glarecui] | 永久锁被设置后，就意味着失去了重复编程的能力了吗？ | |
| [答：Albert] | Yes. | [2005-12-20 11:22:02] |
| [问：xyuding] | 我们正在使用ep1c6,如果换成apa系列，有什么好处 | |
| [答：Albert] | Single chip, high security, live at power-up, lower power consumption, resist to firm/soft error | [2005-12-20 11:22:46] |
| [问：zhangyao518] | 对密钥的存储保护除了电池或恒定电源,还有其它的办法吗? | |
| [答：HuQin] | 您说的是SARM FPGA,他们对于密钥的存储需要电池和恒定电源.对于actel的flash fpga来说,对密钥的存储保护完全不需要电池或恒定电源 | [2005-12-20 11:23:45] |
| [问：ANDYZZ2006] | 目前始用APA系列,換成第三代後,第三代的燒錄器可否也燒APA系列晶片? | |
| [答：Albert] | No, FlashPro 3 is only for PA3/E family. But don"t worry, FlashPro 3 is much cheaper. | [2005-12-20 11:23:59] |
| [问：ecnanjing_EBY7E] | 为什么基于Flash的FPGA的性能优于其它的FPGA? | |
| [答：Albert] | You may refer to today"s presentation for the details. | [2005-12-20 11:24:21] |
| [问：yanxiang] | 我用的是flashpro下载器，但在烧写的过程中，烧写器被烧坏，会是什么原因？ | |
| [答：Albert] | Might due to ESD problem. | [2005-12-20 11:24:44] |
| [问：ypqecum] | 请问功耗多少？耐静电性能如何？ | |
| [答：Dawson] | 我们的功耗只包括静态和动态两个组成,没有SRAM FPGA的上电大电流的功耗需求和上电后配置所需的电流,而且同样规模的FPGA我们的静态功耗是SRAM FPGA的几分之一(Antifuse的FPGA静态功耗低到100uA,Flash FPGA的静态功耗低到2mA),动态功耗也低很多,具体的器件的静态功耗可参看我们的数据手册. 关于耐静电,请参看文档http://www.actel.com/techdocs/qualrel/index.aspx | [2005-12-20 11:25:34] |
| [问：zhangyao518] | 请问ACTEL APA系列的工作频率是不是都很低,我看资料上都只要几十MHz,芯片内部工作频率也只有这么低吗? | |
| [答：Albert] | We have customers using APA to acheive around 120MHz system performance. Typpical performance is about 70MHz. | [2005-12-20 11:25:57] |
| [问：zhangyao518] | 对FPGA的IEEE 1149.1 JTAG调试接口如何进行加密? | |
| [答：HuQin] | 一旦FLASH-FPGA 用FLASH-LOCK 加密以后,如果没有FLASH-LOCK密钥,不能利用JTAG口对FLASH-FPGA进行verify或者调试,更不能进行回读 | [2005-12-20 11:26:12] |
| [问：wxis] | 我现在在用apa300－PQ208封装的芯片做设计，若使用A3PE的容量接近芯片，有可以直接兼容（包括管脚）的芯片吗？价格相比会有什么变化？ | |
| [答：Albert] | We have a migration strategy for APA customers, for certain package, if you follow those design guide-lines, you will be able to replace it with A3P/E directly, please contact our distributor for the guildeline. | [2005-12-20 11:27:14] |
| [问：yanxiang] | actel提过的PCI核，是否有相应的驱动程序？PCI软核和硬核大概多少钱？ | |
| [答：Albert] | Yes, we have corresponding drivers software. However PCI device driver software is already included in most device driver development software. We only provide software PCI core. | [2005-12-20 11:28:56] |
| [问：fuhj007] | 与lattice xp 系列产品比较,A3P有什么优势 | |
| [答：HuQin] | 其实Lattice XP还是传统的SRAM-FPGA,只是将原来外面的配置电路作在里面,跟A3P 是用flash来作的FPGA完全不同. XP的功耗比A3P大,保密性可靠性都要比A3P差. | [2005-12-20 11:29:13] |
| [问：spcatv] | FPGA的技术未来发展方向？ | |
| [答：Albert] | System on a Chip (SoC) | [2005-12-20 11:29:36] |
| [问：zhangyao518] | IP核的保密通常有几种方法?那种效率较好? | |
| [答：Dawson] | 我不是很确却了解您所说的IP是指:您自己开发的代码还是FPGA供应商提供的IP CORE? 如果是指您自己开发的代码,我知道的可以用我们的FLASH或ANTIFUSE的FPGA来保护您的知识产权,关于FPGA供应商提供的IP CORE,我不是太了解,这也是他们的一个知识产权 | [2005-12-20 11:29:41] |
| [问：tianshan1] | Actel公司能提供的标准加密的IP核?它在芯片上实现时所占用的资源是多少？价格如何? | |
| [答：Albert] | We provide DES, 3DES and AES security IPs. Different IP has different resource requirement and prices. Please contact our distributor for the price of these IPs. | [2005-12-20 11:30:55] |
| [问：brownbenson] | FPGA的加密核是用来加密FPGA的编程数据还是用来加密数据交换？ | |
| [答：HuQin] | 您问的是可以在FPGA内部实现的加密IP core吗?象这样的加密core 是用于对数据进行加密 | [2005-12-20 11:31:25] |
| [问：liubh] | 我们有很多产品使用 TI 公司的mps430 CPU，能否移植到FLASH FPGA上？谢谢！ | |
| [答：Albert] | Standard DSP application might be mirgrated to FPGA, but might not be a cost effective solution. The advantage of using FPGA to implement DSP is to use the parallel hardware to acheive higher performance. | [2005-12-20 11:32:41] |
| [问：logic001] | 贵公司产品中是否也含有类似nois之类的软核 | |
| [答：Albert] | Yes, we support ARM7, which is a industrial standard CPU, and receive more support than NIOS | [2005-12-20 11:33:45] |
| [问：wqm119] | fpga的开发软件免费送吗? | |
| [答：Albert] | We have a Gold versin of Libero IDE, which is free of charge! And can be downloaded from our website. | [2005-12-20 11:34:22] |
| [问：glarecui] | 希望了解一下嵌入技术FPGA相结合的内容 | |
| [答：Albert] | You can contact either one of our FAEs, and let"s discuss it in more detail. | [2005-12-20 11:35:10] |
| [问：heike0107] | 我们的产品都是5v的系统,但贵公司的片子都工作在低电压模式,请问贵公司考虑过解决方案吗?? | |
| [答：Albert] | For our ProASIC3 family, we can tolerate 5V input. Our new product Fusion can also support 5V, even 12V input signals. | [2005-12-20 11:35:56] |
| [问：ylkan] | 请问在ProASIC3的体系结构中，FPGA Array是基于SRAM的还是基于FLASH的，贵公司所说的FLASH FPGA 是指FPGA内核全是FLASH工艺还是在里面加了一个FROM？另一个问题是NRE 是什么缩写？ | |
| [答：HuQin] | FPGA内核是用FLASH 来实现的;除此之外我们的A3P里还有一个独立的FROM供客户使用;NRE 是None recoverable expense的缩写 | [2005-12-20 11:37:01] |
| [问：xjjn] | 以 Flash 为基础的 FPGA 的原理是什么 | |
| [答：Albert] | Flash based FPGA use Flash transistor to store the state of configuration element used to control the actual logic to be implement with a logic cell. | [2005-12-20 11:37:20] |
| [问：tongzhongkai] | 在军事上能用到什么地方呢! | |
| [答：Albert] | Rador, trunk radio, missile, etc. | [2005-12-20 11:38:10] |
| [问：ypqecum] | 生产地在哪里？交货期多长？ | |
| [答：Albert] | Mostly in Taiwan. Lead time is about 8-12 weeks | [2005-12-20 11:38:45] |
| [问：fcl-cq] | 在重庆市场上有现货吗？ | |
| [答：Albert] | Please contact our distributor for the details. | [2005-12-20 11:39:16] |
| [问：sjzaly] | flash 都有多大容量系列？ | |
| [答：HuQin] | APA系列: 7.5万门 到 100万门. A3P系列: 3万门 到 100万门. A3PE系列: 60万门 到 300 万门 | [2005-12-20 11:39:26] |
| [问：zlei] | 国内现在能直接申请或者购买到开发工具和样片吗？ | |
| [答：Dawson] | 可以,您可以联系我们的代理:Avnet(www.avnet.com);Lacewood(www.maxtek-icrep.com.tw);Secom(www.secomtel.com) | [2005-12-20 11:39:31] |
| [问：Wellsian] | FPGA主要应用在哪些产品上？ | |
| [答：Albert] | FPGA can be used in a wide range of product, basically it is general purpose. | [2005-12-20 11:39:57] |
| [问：huitang_shen] | 器件的应用环境温度范围 | |
| [答：HuQin] | 具体要看您要选择那个温度等级的FPGA.有工业级,商业级,军用级别;883B等;这些是标准的东西,每个级别都用对应的应用环境温度范围,各个厂家的应该都是相同的 | [2005-12-20 11:42:07] |
| [问：percy_wang] | 如何提高FPGA综合效率，提高逻辑单元的利用率？我机场发现在default状态下的FPGA综合的效果很差，运行频率也很低，怎么解决？ | |
| [答：Albert] | The utilizatoin of logic for synthesis tools requires good HDL coding skill. Writing HDL code is not like writing C/C++/JAVA. It requires to have the hardware in mind. Some synthesis tools have feature like resource sharing, re-timing, etc. to improve the performance and reduce the logic usage, you may try to turn on these features (if available). | [2005-12-20 11:42:31] |
| [问：chpzmax] | 与同等门级的其他器件相比，成本高出多少? | |
| [答：Albert] | Our FPGA (with similar capacity) is cheaper than corresponding SRAM counterparts. And we can provide lower total system cost! | [2005-12-20 11:43:25] |
| [问：老发] | What is SoC ? | |
| [答：Albert] | System on a Chip | [2005-12-20 11:43:33] |
| [问：bjxiong] | 怎么调用fpga里的dsp模块?谢谢！ | |
| [答：Albert] | Which FPGA are you using? | [2005-12-20 11:43:46] |
| [问：kingsword] | Actel的Flash FPGA和Altera的hardcopy的结构化ASIC相比,其安全性有何不同? | |
| [答：Dawson] | HARDCOPY是结构化的ASIC,正如我们提到过FLASH 的FPGA安全性要比ASIC还高.基本的道理是:ASIC一旦被剖开后,可以很容易获取结构信息和逻辑信息(其实结构信息反映了逻辑信息),所以可以容易的被复制.但是FLASH 的FPGA即使被剖开,您可以获取结构信息,但不能获取到逻辑信息,因为我们的逻辑信息是在大量的FLASH 开关中(其实是开关中的电荷的多少),具体请但看http://www.actel.com/products/rescenter/security/index.html | [2005-12-20 11:45:11] |
| [问：ljiangf] | GOLD版和Platimum版有说明区别？ | |
| [答：Albert] | You may refer to the following docurment for the details: http://www.actel.com/documents/liberoPIB.pdf | [2005-12-20 11:45:57] |
| [问：bjxiong] | 用FPGA 实现软件无线电中的DSP部分，该如何建立实验模型？谢谢！ | |
| [答：Albert] | You may use MathLab Simulink to build the modle and perform the system simulation | [2005-12-20 11:47:10] |
| [问：ecna njing_EBY7E] | Actel的FPGA一般都用在高端产品上,在民品上有什么产品吗? | |
| [答：Albert] | No, actually, we have a lot of cusumer based and telecom based customers using our product. For example, GPS, PMP, game console, etc.. | [2005-12-20 11:48:10] |
| [问：leaders] | 相比Altera,Xilinx FPGA，Actel FPGA特点是什么？ | |
| [答：Dawson] | Actel 的FPGA有两种工艺:Antifuse和Flash;而Altera和Xilinx都是SRAM的FPGA.我们的特点如下: 单一芯片(不需要配置芯片) 高安全性 高可靠性 低功耗 在系统编程(FLASH FPGA) | [2005-12-20 11:48:39] |
| [问：kingsword] | FPGA设计安全的主要原理是什么？它和算法有多大关系?是否主要从硬件方面考虑么？可否软硬件结合？ | |
| [答：HuQin] | 主要是因为ACTEL的FLASH和反融丝技术. 除了flash fpga的aes128 算法有一点关系之外,其余的和算法没有关系. 主要是从硬件方面考虑.如果单纯从ACtel的FLASH FPGA 来看,它的纯硬件安全是足够了,如果从整个系统来看,可能回需要软硬件结合---就像前面胶片中讲到的一个有关机顶盒节目和服务加密的例子 | [2005-12-20 11:48:40] |
| [问：johnma] | 你们的fpga的启动套件在什么地方可以买到？大约多少钱？ | |
| [答：Dawson] | 可以跟我们代理联系:Avnet(www.avnet.com),Lacewood(www.maxtek-icrep.com.tw),secom(www.secomtel.com) | [2005-12-20 11:49:49] |
| [问：shu_chen] | 请问Actel在基于Flash的FPGA上做过类似商业化DDC的应用没有？能支持的最高工作时钟是多少？ | |
| [答：Albert] | May I know what is DDC? | [2005-12-20 11:50:11] |
| [问：liubh] | 能利用FLASH FPGA在便携终端上实现单片解决方案吗 | |
| [答：Dawson] | 这是我们的一大优势,由于我们是低功耗的FPGA,也有SOFT ARM7和8051 CORE,而且我们也有业界唯一的数模混合的FPGA:FUSION,http://www.actel.com/products/fusion/ | [2005-12-20 11:52:30] |
| [问：shu_chen] | DDC means Digital Down-Converter | |
| [答：Albert] | Yes, I have seen two customers used it in the based band processing. What is your carrier frequency? | [2005-12-20 11:56:10] |
| [问：shzj527-1] | 其安全性通过什么体现? | |
| [答：Albert] | Through industrial starndard AES encryption/decryption core. | [2005-12-20 11:56:37] |
| [问：w.liu] | 贵公司的FPGA好象没有内嵌18*18乘加器,如要设计一个这样的乘加器要占用多少资源? | |
| [答：HuQin] | 要看您要的是带不带流水线的乘法器,无符号相乘大概是1000多个logic tile资源 | [2005-12-20 11:58:35] |
爱特公司 (Actel Corporation) 以具高可靠性并集成独有基于快闪技术的产品，在传统FPGA厂商中脱颖而出。爱特的低功耗FPGA系列和混合信号FPGA产品不仅面向现今的消费者产品和便携医疗产品市场，同时也致力为未来的绿色数据中心、工业控制，以及航天市场提供解决方案，助力设计人员开发具竞争力的产品。该公司于1985年成立，于纽约纳斯达克交易所 (NASDAQ) 上市，代号ACTL。爱特公司 在上海、香港、台北、东京和首尔设有办事处，并在中国大陆和亚洲主要城市建立了完善的分销商网络。查询更多信息，请访问爱特的网站：www.actel.com.cn
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