在线座谈

热门关键字: GMSK 信噪比 SRS FPGA芯片 

关于本次座谈

精彩问答

主题:飞利浦的PCI Express PHY
在线问答:
[问:mikesonwang] PCI Express PHY能否与Altera FPGA,比如cyclone II或者stratix II相配合? 与PMC Sierra和TI相比,philips的PHY从成本,性能,方面有何优势?请用数字说明问题,并且正面回答。谢谢!  
[答:Ho] Yes. Philips PCI Express PHY can work with Altera Cyclone II FPGA. We are working with Altera on a solution. Our cost versus PMC Sierra PHY will be very competitive. You will like it. We are also compliant and listed on PCI-SIG compliance test. I don"t believe that PMC Sierra PHY is listed on the PCI-SIG Integrators List. We are the only PCI Express PHY vendor listed on the PCI-SIG Integrators List so far.  [2005-10-28 10:28:36]
[问:netxtt] PIC express phy会成为业界统一的标准吗, 将来会取代现有的PCI总线标准吗? 
[答:Christian] Yes, PCI Express will totally replace in the 3 to 4 years to come the current PCI IO architecture. PCI Express is cheaper, more performant and is pushed by Intel, which will make its adoption quick and total.  [2005-10-28 10:31:03]
[问:spsonic] PCI Express与 PCI 相比有哪些变化,是否兼容PCI, 在设计怎样的系统时才需要采用PCI Express? 
[答:Ho] PCI Express and PCI are software compatible. The main differences are all in the hardware. Wherever you see PCI now, there is an opportunity to move to PCI Express, because of performance, PCB cost (serial versus parallel) and compatibility with host computers. FYI - Instat estimated that about 50% of 2005 new PC shipment will be equipped with PCI Express slots, i.e. PCI will disappear over time.  [2005-10-28 10:31:14]
[问:gopinath] What is the whole solution and what data throughput I can expect out of the Xilinx/FPGA solution.  
[答:Ho] The Philips - Xilinx Spartan3 solution has been evaluated by our early customers to have excellent throughput. Actual throughput is dependent on host chipset, software driver etc. On the Lindenhurst, our customer can achieve up to 95% of theoretical maximum throughput.  [2005-10-28 10:33:10]
[问:jimmy88531] 飞利浦 PHY器件在设计应用中是作为主控制器还是作为接口设备来使用的? 
[答:Ho] Our PHY can be used as root complex as well as endpoint.  [2005-10-28 10:33:40]
[问:sundsp] 我们希望利用这种高速串行的器件实现工业系统的在线高速监控:嵌入式控制器中的运行数据通过PHY电路导出至USB接口设备中。是否可行? 
[答:Ho] Yes. You will need to have the PCI Express to USB RTL code in an ASIC or FPGA. Our PHY can handle the PCI Express interface.  [2005-10-28 10:34:48]
[问:baifanshuishou] 1.芯片主要是针对什么价位的客户? 2.是否有jungo公司的驱动程序开发软件的支持? 3.芯片是否能够提供足够详细的中文应用资料? 
[答:Ho] 1. Our chip is suitable for low-cost, high-volume applications. It is also suitable for niche applications. 2. We are working with Jungo now on having its driver toolkit. Please contact Jungo directly for more information. 3. We don"t have a lot of Chinese application notes yet. But those can become available in the future.  [2005-10-28 10:36:40]
[问:fengqiao1981] PCI express 总线可以进行长距离数据吗?最远可以多远? 
[答:Ho] There is PCI Express cable specification in the make, i.e. not ready yet. If you use the cable, it can go from 1m to 10m. If you don"t use the cable specification, on the PCB, it is meant for a max. distance of 12 inches.  [2005-10-28 10:38:19]
[问:风之韵] PCI Express PHY标准取代旧的标准时,将采取什么样的过渡方法? 新标准的成本较旧的有什么优势? 
[答:Christian] The transition will be fast. Every component provider is now moving to PCI Express. Either they acquire an external PCI Express IP or develop it themselves and incorporate it in their ASIC. Another option would be to use an external PCI-to-PCIExpress bridge that will be offered by several companies such as TI or PLX. Another option is to use the combination of a FPGA and our PHY.  [2005-10-28 10:38:50]
[问:luogongqiang] 能否介绍PCI Express的系统架构,以便更好了解PCI Express? 
[答:Ho] In the computers (desktop, notebook, server, workstation), the host bridge and south bridge from Intel, Nvidia, Via etc are moving to PCI Express. They typically give a few x1 PCI Express lanes in the south bridge, and a x16 in the host bridge.  [2005-10-28 10:40:56]
[问:smx64098] 在高速监控系统中,19英寸机箱内我们原来使用的是CAN总线,现在是否可以使用PCIEXPRESS代替?成本上有优势吗? 
[答:Ho] I am not familiar enough with CAN to give you an answer on price. PCI Express is very suitable for high-speed security system, and our PHY has excellent performance to support this system. The Tentmaker Systems board actually features 4 video input chips from Philips, so can serve as a hardware design example for security video.  [2005-10-28 10:44:13]
[问:encaon] PCI Express总线能否直接替代PCI 总线?需要增加何种配置? 
[答:Ho] PCI Express as a standard is meant to replace PCI. In a system, you need chipsets that support PCI Express.  [2005-10-28 10:44:52]
[问:amberyn] 既然改并行为串行,速度是否会大幅度降低?如果没有,为什么? 
[答:Christian] Serial is indeed faster than parallel for the following reasons: 1. the amplitude of the signal is much lower than the VSS-to-VDD amplitude, thereby allowing a much bigger frequency. 2. Serial will automatically come with differential signaling, which provides a big tolerance to noise. 3. The clock is embedded into the data, therefore there is no skew constraints for serial. So the frequency can be very high (will be 5Ghz in PCI Express gen2)  [2005-10-28 10:45:06]
[问:amberyn] 1。pci express是否能兼容PCI-X? 2。PCI express用什么方法保证从并口过渡到串口没有传输速度方面的损耗? 
[答:Ho] 1. PCI Express is software compatible with PCI-X. Hardware wise, it is different. 2. The PCI Express standard is meant from the outset (driven by Intel and many companies) to drive the speed up. The key bottleneck to have higher throughput in PCI-X is the many many connections that are needed. So skew among the data and clock lines become very hard to layout on PCB. With serial connections, just a few lines are needed, so it is easier to do higher speed transmission.  [2005-10-28 10:47:52]
[问:robin] 飞利浦的PCI Express PHY与XILINX的PCI Express有何区别? 
[答:Ho] Xilinx has Virtex II Pro that has integrated PHY, but its Virtex4-LX and Spartan-3 / 3E does not have integrated PCI Express PHY. So our PHY is a companion mixed-signal IC for those FPGA that does not integrate the PHY.  [2005-10-28 10:49:13]
[问:Commity] TI也有类似产品,不知你们的产品和TI的相比有什么优势? 
[答:Ho] We are sampling for many months already; we have many design-ins with customer products already. We are the only discrete PCI Express PHY vendor which has passed PCI-SIG compliance testing and are on the Integrators List.  [2005-10-28 10:50:24]
[问:evanliu] Philips PHY 与 xilinx的FPGA采用的是250M 8bit,想知道xinlinx的IP核与用户的接口形式。 
[答:Ho] Please ask your Xilinx sales representative this question, as this pertains to Xilinx"s product LogiCORE IP core.  [2005-10-28 10:51:54]
[问:vip-jinzhao] 我开发的是数字硬盘录象机,现在使用的是PNX1502E的CUP。目前使用了简化的PCI总线标准。我们的下一代产品准备使用,可以直接采用PCI Express吗?可以推荐几款芯片和CUP吗? 
[答:Ho] Please explain what is CUP.  [2005-10-28 10:52:53]
[问:maeleton1] 能否举例说明数据包在两个设备中传输的实际流程和应该注意的问题? 
[答:Ho] Not very sure what this question means. Please rephrase your question.  [2005-10-28 10:54:14]
[问:wqpatric] PHY必须和cyclone和spartan3等FPGA相连接共同组成PCI Express系统,但是这类FPGA的IP核实不对外公开的,这是否会造成系统成本的增加? 
[答:Ho] Both Xilinx and Altera offer PCI Express cores. Please contact them to get more information. I believe that evaluation versions are available free from these companies. But please check with them directly.  [2005-10-28 10:55:36]
[问:spsonic] PCI Express 最高速度为多少,布线时应注意什么? 
[答:Christian] The PCI Express speed is fixed as per sepcification to 2.5Gb/s per lane. So the frequency is fixed, but the bandwidth can be scaled according to the needs of the application: 2x2Gb/s for x1, 2x8Gb/s for X4, etc Regarding the layout, it is necessary to lay out the 2 differential signals as more symetrical as possible ( same length, same coupling). Pls refer to our layout guidelines document for further details  [2005-10-28 10:56:16]
[问:maeleton1] PCI Express总线对时钟有何特别的要求如抖动和相位?TXCLK和RXCLK有何不同? TXCLK和RXCLK需要同步吗? 
[答:Ho] PCI Express has a refclk at 100MHz, 300ppm. TXCLK is the transmit clock to clock the transmit data from MAC to PHY. RXCLK is the clock to synchronize the receive data from PHY to MAC. TXCLK and RXCLK do not need to be synchronized.  [2005-10-28 10:57:35]
[问:smx64098] 专家你好: 第一次接触PCIEXPRESS,请问可以在19英寸机箱里代替CAN总线吗? 另外,各插件是不带智能芯片吗? 这只是一个并行--串行---并行的接口吗?这样的接口成本是多少? 谢谢 
[答:Ho] Sorry. I am not familiar enough with CAN to answer your question.  [2005-10-28 10:59:40]
[问:ROE] 请问飞利浦的PCI Express PHY的误玛率能低到什么水平? 
[答:Ho] <10 to the power -12, i.e. better than the spec requirement.  [2005-10-28 11:00:08]
[问:ROE] PCI Express总线接口的阻抗是多少? PCI Express总线的传输距离有多长? 
[答:Ho] PCI Express transmit line differential impedance is 100 ohms. The max. distance on PCB is 12 in.  [2005-10-28 11:00:55]
[问:ishiwho] 在家电消费电子类产品中,PCI EXPRESS有何发展的趋势或者是优于其他总线的优点,那家MCU又采用这种总线的意向?PHILIPS在采用吗? 
[答:Ho] In consumer electronics, we know that some new chips from various vendors will use PCI Express, because of its high throughput. Philips will have more PCI Express products. Philips already has other PCI Express products, such has PC-TV chip.  [2005-10-28 11:03:24]
[问:john.sh] PCI在进行长距离数据传输时(如10米),速度会是多少,信号会失真吗? 
[答:Ho] Do you mean PCI or PCI Express in this question?  [2005-10-28 11:03:48]
[问:ROE] PCI Express总线接口对降低电磁干扰(EMI)有何特点? 
[答:Ho] PCI Express uses spread spectrum clocking to reduce EMI. Also, it uses low-voltage differential signals, which also help reduce EMI.  [2005-10-28 11:05:01]
[问:smx64098] 能介绍一下,PCIEXPRESS在嵌入式系统有应用吗?谢谢! 
[答:Ho] In embedded systems, PCI Express can be applied in security videos, storage, test equipment, medical equipment, communication systems. It is up to your imagination.  [2005-10-28 11:05:47]
[问:dsh_wang] PCI Express PHY 对外供电电压和最大电流的设计要求? 
[答:Ho] Philips PHY uses 1.25V, 3.3V and 2.5V. The total power consumption is less than 300mW including IO.  [2005-10-28 11:06:29]
[问:amberyn] 您刚才说PCI EXPRESS可以支持5G时钟,那么如果串行数据帧采用8BIT传输,速度为不大于625byte每秒,而现在的PCI如果采用133M,64位传输,已经可以达到1064BYTE每秒,似乎速度方面没有大的提升,只是在成本和系统开发复杂度方面好一些吧? 
[答:Ho] PCI Express supports 2.5Gb/s in transmission and reception in full duplex. In PCI 133MHz and 64 bit, you indeed have higher throughput, although in PCI you can only have one device talking at a time. In PCI Express, you can have every endpoint talk at the same time in transmit and receive modes. And also, there are not too many systems who can work with PCI 133 MHz and 64 bit in reality, though PCI spec supports this configuration. This is a practical limitation that real design with 133MHz and 64 bit PCI runs into.  [2005-10-28 11:10:47]
[问:liuzhaoquan] 目前PCI Express PHY的芯片价格如何?在嵌入式领域该接口是否已经被广泛使用? 
[答:Ho] Philips PCI Express PHY and low-cost FPGA can be available together at as low as $12 to 15 in high volume. It can be used in embedded systems.  [2005-10-28 11:12:01]
[问:maeleton1] PCI Express是如何在双向传输中确保数据包的完整性?有何具体措施? 
[答:Ho] The PHY layer is required to have a low bit error rate. The data link layer makes the PHY layer appear to be error-free.  [2005-10-28 11:14:08]
[问:zzkeng] Philips目前可提供的PCI Express PHY的产品有那些?能简单介绍一下具体性能吗? 
[答:Ho] We currently have x1 PCI Express PHY PX1011A and PX1012A.  [2005-10-28 11:14:56]
[问:lbgy] PCI Express总线的数据传输安全性如何?如何确保传输数据的安全性? 
[答:Ho] What do you mean precisely about security? Do you mean whether the data can be probed by intruders?  [2005-10-28 11:16:33]
[问:lbgy] 是否目前的PCI Express PHY都是采用FPGA来实现? 
[答:Ho] No. We have FPGA customers. We also have ASIC customers.  [2005-10-28 11:17:03]
[问:looklook] 你好,我想问一个问题,现在的pci express好像和网络交换架构很相似。 请对比一下pci express和802.3的10GE接口之间的异同?谢谢。 
[答:Christian] 10-Gigabit Ethernet is a strong contender for next-generation backplanes but PCI Express is coming even more strongly. Both technologies rely on a very high speed serial differential signaling to convey the data. They also have in common a layered complex protocol to support the technology. PCI Express has the advantage over Ethernet of the scalability. It seems that both technologies will coexist for a while  [2005-10-28 11:17:17]
[问:bjxiong] MAC Layer 与Data Link Layer连结的数据结构是怎样的? 
[答:Ho] This is up to the implementation of the specific PCI Express protocol vendor.  [2005-10-28 11:18:24]
[问:greatddq] 请问,家电类产品使用pci express 总线接口,对智能家居使用具体有什么耗电解决方案 
[答:Ho] PCI Express standard is meant to be lower power than PCI.  [2005-10-28 11:19:48]
[问:theuntitled] 你认为这zhognPCI E的PHY在标准的计算机X86系统中应用的前景如何(这种系统一般芯片组都直接提供了PCI Express的总线)? 
[答:Ho] PCI Express is already available on many PC, including DELL, e.g. Intel is the driver of PCI Express standard, so it has a lot of PCI Express chip support.  [2005-10-28 11:21:54]
[问:lbgy] PCI Express总线的前途如何?能否全面取代PCI总线? 
[答:Ho] PCI Express is meant to replace PCI completely in a few years.  [2005-10-28 11:22:52]
[问:tim111111] 飞利浦该类芯片,最低工作温度为多少。 
[答:Ho] The min operating temperature is specified at 0C.  [2005-10-28 11:23:20]
[问:john.sh] PCI Express在进行长距离数据传输时(10M),速度会是多少?信号会失真吗? 
[答:Ho] If you use PCI Express cable, the speed is 2.5Gb/s for x1 PCI Express, just the same as plug-in card.  [2005-10-28 11:24:29]
[问:luogongqiang] 能否简要说明PCI Express比PCI总线接口的主要优点? 
[答:Christian] PCI Express offers many advantages over PCI: 1. Performance.    PCI Express can support bandwidths from 2x2Gb/s (for a x1) up to 2x64Gb/s ( for a x32)   The max bandwidth offered by PCI is 133Mx32=4.2Gb/s 2. Cost    PCI Express needs much less space than PCI on a PCB, thereby reducing the size and the number of layers of the PCB, hence the cost 3. The design & layout of PCB is much easier with PCI Express 4. In addition, PCI Express also comprehends different data types, provides extended configuration attributes, offers power management and quality of service features, supports hot plug and hot swap, and provides superior data integrity and error handling.   [2005-10-28 11:27:26]
[问:theuntitled] PCI Express采用的是Common Clock还是Source Synchronous的架构,对于最大走线长度12in.是如何确定的? 
[答:Ho] PCI Express interface uses embedded clocking, so there is no explicit clock lines, i.e. different from PCI. According to PCI Express spec, you have 13.2dB loss budget from transmitter to receiver. There is connector loss, breakout area loss. Every inch trace has up to 0.35 to 0.50dB loss. So the max. trace on system board has to be less than 12in. So the trace on plug-in card should be less than 3in.  [2005-10-28 11:27:43]
[问:zzkeng] PCI Express总线的速度很高,它的传输距离有多远?对PCB布局有何特别的要求? 
[答:Ho] We have PCB layout guidelines. Please go to our website for more information.  [2005-10-28 11:28:17]
[问:puremyself] what data transport mode does ur PCI express support? 
[答:Ho] What do you mean by data transport mode?  [2005-10-28 11:28:54]
[问:bjxiong] PX1011A的Power off是内部软件控制还是外部控制? 
[答:Ho] There are different power save modes, which can be controlled by MAC layer, via PXPIPE interface. If you want to power off the chip entirely, just take away the power of the chip.  [2005-10-28 11:29:51]
[问:mikesonwang] Hi Ho Wai, Would you give us the general pricing idea and lead time of Philips PHY 1011? based on 100kpc/y. Thanks 
[答:Ho] Our regional sales office handles pricing. Please contact our sales office. We are sampling now (i.e. no lead time for sampling). For production parts, we are targeting early 2006. You will find our pricing to be very competitive.  [2005-10-28 11:31:02]
[问:greatddq] 智能家居问题关键的就是一个同意协议标准的问题,请问你们的pic express针对于这个领域有什么方案或者针对于底层开发平台,如果mcu 有什么具体的支持或者方案提供 
[答:Ho] Do you mean how our PHY chip interfaces with microprocessors?  [2005-10-28 11:32:42]
[问:john.sh] 目前Piliphs PCI Express PHY的芯片在哪些行业有成功的应用,? 
[答:Ho] We have customers in many applications, e.g. test equipment, imaging, video, medical equipment etc.  [2005-10-28 11:33:45]
[问:KINLYLAY] Dose the layout regarding the four signal line has special require? And can you tell us what it is? 
[答:Ho] Yes. We have PCB layout guidelines. The details can be requested from our website.  [2005-10-28 11:34:24]
[问:iseeklin] 请我PCI EXPRESS接口 和AGP接口 是如何转换的,会有性能的损失吗 
[答:Ho] AGP is a video connectivity standard. Various companies have already offered PCI Express to replace AGP. Performance is supposed to be better than AGP.  [2005-10-28 11:35:36]
[问:1001] PCI Express是英特尔普及全球的PCI与PCI-X架构的下一代技术,飞利浦在这方面的技术特色是什么? 
[答:Ho] Philips offers mature mixed-signal PCI Express PHY technology.  [2005-10-28 11:36:15]
[问:leonqin] 采用PCIE PHY后,FPGA侧的工作量有多大?大概需要多少le(lut)s? 
[答:Ho] It depends on which FPGA and which PCI Express IP core you use. For example, on Spartan3S1000, about 30% is used for one implementation of PCI Express IP core.  [2005-10-28 11:38:20]
[问:youyubing] 请问PCI-E技术现在是否已经成熟?谢谢。 
[答:Ho] Yes. You can find already a lot of computers on the market with PCI Express slots, desktop, notebook, workstation and server.  [2005-10-28 11:41:15]
[问:luogongqiang] PCI Express的驱动程序和操作系统是否和PCI兼容? 
[答:Ho] Software driver and operating system are meant to be compatible from PCI to PCI Express.  [2005-10-28 11:41:44]
[问:tanglx] 据我所知,XILINX的FPGA已经集成了很多差分对,还有必要加PHY器件吗? 
[答:Ho] The lower cost FPGA, such as Spartan-3, -3E and Virtex4-LX cannot support PCI Express PHY functions.  [2005-10-28 11:43:07]
[问:疯狂总动员] 请问如何与XILINX的FPGA连接? 
[答:Ho] The interface is PXPIPE.  [2005-10-28 11:43:36]
[问:greatddq] 对,我的问题就是包括贵公司的mcu和其他公司的16位的mcu,比如430 等 
[答:Ho] For now, we have a PHY product, which still requires digital protocol layer to be implemented in an FPGA or ASIC, for connection to MCU.  [2005-10-28 11:44:44]
[问:shzj527-1] Philips PHY器件与PCI Express 规范v.10a兼容吗? 
[答:Christian] The answer is yes. Our PCI Express chip is fully compatible with v1.0a spec. Together with our partner Xilink, we passed the PCI-SIG test plugfest in June and were added to the PCI Express integrator list In addition, we believe that our PHY is also compatible with v1.1 spec. We also passed the informational v1.1 test in the same June PCI-SIG plugfest session.   [2005-10-28 11:44:46]
[问:ezawen] PCI Express PHY 的测量能达到多少位? 
[答:Ho] This is a serial bus.  [2005-10-28 11:46:06]
[问:liuzhaoquan] 请问你们什么时候提供PCI EXPRESS PHY样片?是不是只有重要客户才能最先拿到样片 
[答:Ho] We have been sampling for a few months already to all customers. Please go to our website to request samples, if you have a project ongoing.  [2005-10-28 11:46:53]
[问:smx64098] 我如果有这方面的问题或是比较感兴趣,可以与谁联系? 
[答:Ho] Please go to our website and there is a link for email enquiry. http://www.standardics.philips.com/products/pcie/phys/  [2005-10-28 11:47:45]
[问:theuntitled] 这个PHY现在有没有提供完整的SI仿真模型(SPICE模型),以及仿真结果的报告? 
[答:Ho] We provide IBIS model for PCB signal integrity analysis. We don"t have SPICE models.  [2005-10-28 11:48:40]
[问:leonqin] 1011a与1012a区别大吗 
[答:Ho] Please see our website for details. http://www.standardics.philips.com/products/pcie/phys/  [2005-10-28 11:48:57]
[问:1001] PCI Express接口中的同步时钟是内同步还是外同步,资源如何分配? 
[答:Ho] Do you mean PXPIPE or PCI Express interface? For PCI Express interface, the clock is embedded in the data. So there is no explicit clock.  [2005-10-28 11:49:41]
[主持人:ChinaECNet] 恭喜您, 烟台东方电子集团的smx64098经过电脑抽奖您在本次座谈中获得一部MP3播放器。请网名为smx64098的用户与中电网联系(8610-82888222-7008 或 lilin@chinaecnet.com)。  [2005-10-28 11:49:47]
[问:kaixin2023] PCI-E is more compatible,but will it be able to replace of PCI and contains all the functions of PCI? 
[答:Ho] Yes. PCIe is meant to replace PCI.  [2005-10-28 11:50:05]
[问:lbgy] 目前,很多厂商都开发了基于PCI EXPRESS产品,不知贵公司的产品与ALTERA公司的同类产品,在性能方面有什么优点 
[答:Ho] We also work with Altera on Cyclone II interoperability with our PHY.   [2005-10-28 11:50:46]
[问:outside] 还有一个问题, 据说PCI Express总线可以减少PCB层数,那么4层板能否排得开? 
[答:Ho] It is possible for our Philips PHY. You need to check for the other components.  [2005-10-28 11:52:06]
[问:vip-jinzhao] 谢谢六位专家的解答,同时也感谢Philips Semiconductors。这使我更加了解了PCI Express,对我今后的工作很有帮助。也祝福几位专家在今后的工作中一切顺利。 
[答:Ho] You are welcome. Hopefully, you can use our product in the near future.  [2005-10-28 11:52:34]
[问:luogongqiang] PCI是并行的,为什么PCI Express要采用串行接口? 
[答:Christian] The main problem with parallel data is skew. In a 32-bit bus architecture, all the 32 data bits have to be synchronized with the clock. This puts a strong limitation on the max frequency that the 32-bit bus can achieve. The max speed of PCI is only 133MHz. In PCI Express the clock is embedded into the data. Serial thereby eliminates the skew limitation. So the frequency can go much higher. Another reason is noise. 32 data lines that switch at the same time will generate much more noise than a serial link.  [2005-10-28 11:52:42]
[问:tim111111] 你好,请问FPGA端与贵公司芯片接口,引脚资源需要多少。另外贵公司该芯片封装有几种。谢谢 
[答:Ho] The PXPIPE interface uses 37 pins.  [2005-10-28 11:52:52]
[问:1001] 接口是否需要额外的ESD保护? 
[答:Christian] No, Our PHY has internal ESD built-in protections for each pin.  [2005-10-28 11:54:24]
[问:lemys] 我很关心系统的EMC、EFT和ESD。请详细介绍一下 
[答:Christian] EMC should not be a concern because: 1. The number of lines is small: 4 for x1 2. The amplitude is reduced compared to PCI, so the total energy contained in the signal is lower than PCI.   I do not think that EFT is aproblem either because of the same reduced amplitude.   Our PHY has ESD built-in protections for each pin, including the PCI Express TX and RX pins. That should not be a concern either.  [2005-10-28 12:01:31]
[问:cryoice] 串行与并行相比传输速率是高还是低那,是否为了可靠而牺牲了一些性能那 
[答:Bin] The  bandwidth of x1 PCIe is 4Gb/s, which is compatible with 133MHz, 32bit PCI. But with PCIe, you can go to x4, x8,..lanes, and get much higher bandwidth.  [2005-10-28 12:03:32]
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