| 座谈主题：数模转换器(DAC)的基本原理 |
| 在线问答 |
| [问：jdshen] |
DAC（ADC）中数据几种格式（IIS，左对齐，右对齐）如何选定？与所使用的硬件是否有关系？ |
| [答：Char
les_Lee] |
This dependent on the audio source you used. Normally, I2S justify is
the most common format used. As I know, some of of the audio sources can
do the select too. |
[2002-12-19 10:58:15] |
| [问：clx_01] |
1.能否介绍一下sigma-delta原理的DAC和ADC?2.前一次的ADC讲座我错过了，能否得到相应的资料？ |
| [答：Way
ne_Zhou] |
Hi all of the principles of the Sigma-delta was given on the seminar.
For more details, you need to read some other books. For the seminar file
last time, please offer your email address and city where you"re in, then
either you can contact with our disti for it, or we can send it to you on
your request. |
[2002-12-19 11:00:56] |
| [问：shizd] |
贵公司8,10或12位高速四象限D/A产品中是否有+/- 5V供电，Rail to
rail输出，并行接口，TTL 或3.3VCOMS电平接口的品种，国内是否容易采购？谢谢！ |
| [答：Eagle] |
AD5582/3 is QUAD, Parallel-Input, Voltage Output 12-/10-Bit
Digital-to-Analog Converter with +/-5V power supply.You can contact
distributors (for example, 0755-83781459 for Chinactronic Shenzhen
office)to get it. |
[2002-12-19 11:01:36] |
| [问：lmfre
e_2000] |
一个好的数模转换产品的主要指标有那些，该如何衡量和选择？ |
| [答：Way
ne_Zhou] |
All of the main performance specs you can find on this seminar
materials. But really, when you choose DAC, it"s depending on your system
request, so maybe conversion rate, maybe resolution, monotonicity, or
other specs are most important. |
[2002-12-19 11:03:21] |
| [问：he_xm] |
请问DAC分辨率和动态范围的关系及与前面ADC的关系，如频率等？谢谢！ |
| [答：Char
les_Lee] |
Normally, the Dynamic range is relative to resolution. Higher
resolution has better SNR and dynamic range. ADCs have the same
characteristics. |
[2002-12-19 11:06:32] |
| [问：se
agive] |
比如做超声波通信，就是有两个终端，分别进行发送和接收，那么发送端的DA的精度是不是要比接收端的AD的精度要高，如DA要14bit的，AD只需12bit的，同时DA的频率是不是要比AD高10倍左右？谢谢。 |
| [答：Eagle] |
It depends on you system. For the ADC, please consider your sentivity
(AD6644 is 14 bit, AD9226 is 12bit. Please note 3db sentivity lower will
cause half in receive distance).Normally use our TXDAC (for example,
AD9777, 16-Bit Resolution, 160/400 MSPS input/ Output Data Rate,
Selectable 2x/4x/8x Interpolating Filter). You can use a higner clock
rate, it will let you very easy to design filter, get very high SFDR.
Please contact ADI local office for detailed information. |
[2002-12-19 11:07:39] |
| [问：huan
gxq26_
007DB] |
希望座谈会上能够讨论提供价廉、高性能的2路DAC方案。 |
| [答：Willia
m_Koon] |
The seminar focuses mostly on the technology surrounding
DAC. Without knowing the exact performance requirement, it is
difficult to make recommendation which matches your design/cost
target. Please contact our sales office for information on
selecting DAC. |
[2002-12-19 11:10:47] |
| [问：深圳eiei] |
D/A转换器的精度与分辩率有何关系？是否分辩率越高，精度越高？ |
| [答：Way
ne_Zhou] |
Normally resolution means how many different input or output analog
value it maybe from the DAC. But for accuracy, you need to consider noise
and distortation. ENOB=(SINAD-1.76)/6.02. You can refer to last time
seminar of ADC. |
[2002-12-19 11:11:06] |
| [问：shihj] |
如何测试DAC电路的SNR和SFDR?如何利用DAC电路的镜频输出？设计中如何考虑电源/地的设计？一般来说,随温度变化时，DAC器件哪些指标会受到大的影响？影响的范围是哪个量级？ |
| [答：Liao_W
en_Shuai] |
Refer to page 40 of the presentation.Just use a band pass
filter after the DAC output, please.Refer to the
link:http://www.analog.com/technology/amplifiersLinear/
training/sensorSignal.htmlCharpter
10.Normally, the performance will change within the datasheet. So,
refer to the datasheet of each DAc please. |
[2002-12-19 11:11:46] |
| [问：chen
mingji] |
数字部分的地和模拟部分的地是一点接地好还是大面积接地好？ |
| [答：Liao_W
en_Shuai] |
Normally, you have separate them in the board. Then connect them in
one point. Normally, we would recommend you use a ground plane in the
board to get the lowest impedance, thus the level will be almost the same
for the whole board. |
[2002-12-19 11:13:38] |
| [问：kentxu] |
请问:
PWM型的DA能否做到:12位分辨率,6ms的速度.如何实现? |
| [答：Way
ne_Zhou] |
It"ll be difficult to reach 12 bit PWM DAC, because of the
architecture, as at the output the RC circuit can not reach that high
accuracy. |
[2002-12-19 11:13:41] |
| [问：zhouqlin] |
DAC输出0~20mA电流环，在工业现场（如电力500KV变电站）做远距离传输，其接口在抗干扰方面有什么考虑？ |
| [答：Eric_Liu] |
You can use optocouplers in data input port to isolate your system
from transmission. More information Pls. referenc AD421
datasheet. |
[2002-12-19 11:14:42] |
| [问：beemi] |
在进行AD/DA时，外部时钟如何控制转换？时钟的准确度如何影响转换？ |
| [答：Liao_W
en_Shuai] |
OK, for the ADC, there will be pin for the start conversion and the
end of conversion. But for the DAC, only use the start conversion
controlled by the processor.For the clock that influence the
resolution, refer to the datasheet of AD6644, there is a equation in
it.For low frequency conversion, the effect can be negelegible.
But for the high speed, take care of it please. Or the resolution will be
very low.Any detailed information needed, send mail to
china.support@analog.com please. |
[2002-12-19 11:17:02] |
| [问：heluoyi] |
我在DTO（数字调谐振荡器）中使用了14位的DAC（AD9754）后接运放，输出电压范围0~20V,作为控制VCO的调谐电压。我的问题是DAC以及运放将对输出电压带来多大的噪声电压？？？，如何计算和估计这一噪声电压？本例中是不是产生约为1mV的噪声电压？？？ |
| [答：David
_Carr] |
The typical output noise of the AD9754 is 50 pA/rtHz with a 20 mA
full-scale. To calculate the noise you need to know the bandwidth it is
being measured in, and scale it to the current setting. For example, the
noise in 100 kHz bandwidth at full-scale would be:50 pA *
sqrt(100kHz) / 20 mA.Then you would scale this to the op-amp gain
(20 V / 20 mA) |
[2002-12-19 11:20:31] |
| [问：zzkapo
k@163.com] |
我想知道带内插的da具有什么优点，该什么时候选用？ |
| [答：Liao_W
en_Shuai] |
OK, the interpolation the DAC will ease the design of the filter after
the DAC.When you want to use it in the high speed and ease the
requirement of the filter after the DAC, use the interpolation DAC,
please. For detailed information, refer to the datasheet of AD9772,
please. |
[2002-12-19 11:22:14] |
| [问：xeonjohn] |
补充一下，我的系统需要4通道，12位或14位，通过率在200k以上的DAC，并且希望是并口或IIC，AD公司对此有什么解决方案？ |
| [答：Eric_Liu] |
Pls. ref next parts datasheet: 12bit parall interface AD5283; 14 bit
parallel interface AD7835/36. More parts find at
www.analog.com |
[2002-12-19 11:22:23] |
| [问：huan
gxq26] |
请推荐：高性能、价廉的多路高精度D/A转换器，最好为16位，接口方式（串行/并行方式）不限定。 |
| [答：Willia
m_Koon] |
Depending on your requirement, below is some part numbers for your
reference:16-bit multiplying DAC: Dual: AD5545, Quad: AD5544DAC on
Microconverter: ADuC series of products have DACsPlease contact our
sales office for further information |
[2002-12-19 11:23:00] |
| [问：qin] |
如何获得满刻度的模拟信号量？要加上1LSB该如何处理？ |
| [答：Way
ne_Zhou] |
It depends on the internal architecture of the DAC. So normally the
maximum output is FS-1LSB. If you need output higher than that, you need
to select a bigger analog output range DAC. |
[2002-12-19 11:23:30] |
| [问：gddgdls] |
１．一般的數模轉換器在不加運放與電壓滿足情況下，可否驅動變頻器或伺服驅動器？２．怎樣才能獲得ADI公司器件光盤資料,若能像美信公司提供的那樣.3.數模轉換器能否設定成單電壓供電,最好不要有負電壓. |
| [答：Charl
es_Lee] |
1. This design will be very citical since this design is nor robust
enough that can cause the EOS problem. I suggest you still need an
external buffer there.2. Please contact our local office and we can
provide the CD-ROM to me and keep you update all the time.3. Yes. Many
ADI parts can do this. Please contact us. |
[2002-12-19 11:24:20] |
| [问：qin] |
演示中谈到增益误差对DAC性能的影响，该如何最大限度地降低它的影响？ |
| [答：Liao_W
en_Shuai] |
This is decided by the DAC itself. So, just select the one can meet
your requirement and do the right PCB layout.One alternative you
can consider is to calibrate it in your application. |
[2002-12-19 11:25:09] |
| [问：lxy9712] |
请介绍一下DAC在软件无线电中的应用 |
| [答：Eagle] |
The key advantage in software is that there is no need to change your
hardware when you change protocol. For example, for the transimiter,
use ADSP-TS101 DSP -> AD6623 (4 channel upconverter) ->
AD7772A(14bit 160 MSPS TxDAC ) or AD9777 (16bit 160MSPS TX DAC) ->
AD8346 (0.8 GHz–2.5 GHz Quadrature Modulator to elimate image) and sent to
LPA.For the receiver, you use Antanta -> AD8354 (100M~2.7G, 20db
gain, 3.9db NF) ->AD8344 (active mixer) -> AD8350/1 (low distortion
1GHz differential amplifer) -> AD6644+AD6636 or AD6652 (12 bit 65M ADC
with Quad-Channel Receive Signal Processor for GSM, PHS, AMPS, UMTS,
WCDMA, CDMA-ONE,IS95, IS136, CDMA2000, EDGE, IMT-2000) -> ADSP-TS101
(1500 MFLOPS or 6.0 GOPS performance powerful DSP). Then you can support
WCDMA, CDMA2000 and TDS-CDMA with the same hard ware platform. |
[2002-12-19 11:26:57] |
| [问：
zhang.zz] |
D/A转换如何设计后继放大电路来真正利用D/A的转换精度zhang.zz |
| [答：
Eric_Liu] |
Amplifier you use must be high precision,low noise,high input
resistor.like OP777/727/747 etc. |
[2002-12-19 11:29:03] |
| [问：pan8816
8@cnnb.net] |
请问:
DAC在接线时如果用光纤的方式会不会有其它的问题发生,(指的是信号) |
| [答：Charl
es_Lee] |
The only one issue bring here is, does the optical transceiver will
cause the clock jitter. If this is not the case, this method should be
O.K. |
[2002-12-19 11:30:03] |
| [问：wins
ton0001] |
如何保证DAC的转换特性达到最佳，那些周边硬件指标影响它呢？ |
| [答：Willia
m_Koon] |
The most significant external source of error for high speed DAC (e.g.
TxDAC) is perhaps clock jitter. For lower speed system,
buffer/amplifier noise at the output stage is
important. Depending on your application, different noise
source can dominate. |
[2002-12-19 11:30:50] |
| [问：
ximonyu] |
通过并行采集的模拟数据,如何以pwm的形式D/A还原? |
| [答：
Eric_Liu] |
connect a low pass filter Pls. |
[2002-12-19 11:31:19] |
| [问：
fuzzy] |
请教简单地解释：过采样和欠采样的原理和应用，谢谢 |
| [答：Liao_W
en_Shuai] |
Normally, the ADC and DAC has to be used under the principle of
Nyquist. For the Undersampling, the sample rate will be under the signal
frequency, oversampling is over the signal frequecny.Undersampling
is used in the wireless base station, and other fields. The oversampling
is widely used.For detailed information refer to the
link:http://www.analog.com/technology/amplifiersLinear/
training/highspeed.htmlCharpter
4, please |
[2002-12-19 11:32:10] |
| [问：
xeonjohn] |
我的系统需要4通道通过率在200k以上的DAC，并且希望是并口或IIC，AD公司对此有什么解决方案？ |
| [答：Eagle] |
You can use AD5583(10bit 4 channel, parallel port) or AD5344 (2.5 V to
5.5 V Parallel Interface 4 channel DAC). |
[2002-12-19 11:32:37] |
| [问：ecnan
jing_EBY7E] |
我是射频工程师，请问DAC的数字噪音与位数有什么关系？ |
| [答：David
_Carr] |
Theoretical noise floor in a DAC can be derived as in an
ADC:SNR = 6.02 * N + 1.76 (dB)Where N = #
bits.This only considers the quantization noise. This is the noise
due to quantization of a signal to a finite resolution.There are
many factors in a high-speed DAC that will increase the noise beyond the
theoretical limit. These include: DNL noise (imperfect quantization),
clock jitter, digital feedthrough and non-linear output effects.We
typically specify the high-speed DAC noise in dBm/Hz, which can be scaled
to the desired bandwidth. |
[2002-12-19 11:35:46] |
| [问：rathao
shen] |
现在AD公司的DAC最高带宽能到多少？ |
| [答：Way
ne_Zhou] |
You can refer to TxDAC series and video DAC, whose bandwidth can reach
to hundreds of MHz. |
[2002-12-19 11:36:39] |
| [问：ZTB] |
专家您好！我注意到您在产品分类时没有把PWM方式和△-∑的DAC考虑在内它的特性与您讲过的那些在指标上有那些注意区别？ |
| [答：Willia
m_Koon] |
The products we offer are typically aiming at the higher performance
market. PWM and Sigma-Delta are usually used in applications
which require lower accuracy. |
[2002-12-19 11:38:10] |
| [问：
merlinhay] |
如何解决温度引起的误差 |
| [答：Way
ne_Zhou] |
At first, you need to choose component with low temparature
coefficient; then try to lower current through it, to lower temparature
increasing; also you may need temparature control. Or you can use
temparature compensation. |
[2002-12-19 11:38:48] |
| [问：qin] |
ADI公司有没有DDS（Direct Digital
Synthesis）产品？能举出一些型号来吗？ |
| [答：Charl
es_Lee] |
AD9850/51/52/53.. and AD9832/33/34 |
[2002-12-19 11:41:59] |
| [问：lglliu
@sina.com] |
我想问一下，把0和1的转换成调频的正/余弦波有没有现成的dac芯片？ |
| [答：Eagle] |
You can use AD9854 (CMOS 300 MSPS Quadrature Complete DDS). It has an
FSK function, that is, you can set two different frequency in two
frequency control register, then you add your 0/1 signal in the FSK pin,
the output frequency will change between f1 and f2 arrcording the FSK
input. Similar DDS we have AD9850, AD9852, AD9857 (CMOS 200 MSPS
14-BitQuadrature Digital Upconverter, any modulation way you can
achieve) AD9858(1GHZ) and AD9833, AD9834, AD9835 (low cost version
50M). |
[2002-12-19 11:44:10] |
| [问：samire] |
请谈一下失调对DAC性能的影响。最大允许值为多少？采用自动调零能消除吗？调零的周期多少合适？ |
| [答：Way
ne_Zhou] |
Offset will cause all analog output to increase or decrease with same
value. The maximum allowable offset depends on your system request. The
offset caused by DAC itself can"t be cut off using chopper, but if it"s
DAC output amplifier"s problem, you can. |
[2002-12-19 11:45:35] |
| [问：廖庆国] |
在数模转换器的选型上，主要要考虑哪几个指标？ |
| [答：Eagle] |
Many, number of bits, set up time, DNL/INL, etc. |
[2002-12-19 11:45:49] |
| [问：mars
zhang] |
在audio的Sigma-Delta
DAC中，基带（20kHz)内的SNR是96dB,但是带外的SNR只有65dB的话，请问对DAC的性能有没有影响？ |
| [答：Liao_W
en_Shuai] |
Would you please describe your question clearly. Or you can send mail
to china.support@analog.com for more information. |
[2002-12-19 11:46:07] |
| [问：samire] |
平滑滤波器是影响DAC的低频性能还是高频性能？或者两者都有？ |
| [答：Willia
m_Koon] |
I"m not too familiar with the term "平滑滤波器". Typically the
output from the DAC needs to be connected to an anti-aliasing filter to
cancel out the mirror image in the high frequency
domain. Anti-aliasing filter have performance implication for
both low frequeny and high frequency performance because the "image" will
reflect to the whole signal frequency spectrum. |
[2002-12-19 11:47:34] |
| [问：3qu] |
DAC的稳定性（温度/时间）如何决定？ |
| [答：Charl
es_Lee] |
This is dependent on the Voltage refrence on chip. The tempco is the
key specifications you need to check on the data sheet. If you are looking
for higher accuracy one, use external votage refrence such as ADR4xx
family is good candidates. |
[2002-12-19 11:47:36] |
| [问：lglliu@
sina.com] |
为什么我的问题没有得到回答，是否问题太笼统?我的问题也可以描述成将0与1调制成符合F2F格式的磁信号，有没有相应的芯片可以完？ |
| [答：Eagle] |
I am not sure if the DDS (direct digital synthesis) AD9854 can meet
your requrement. It can do FSK, BPSK, PSK, CHIRP, AM etc. Dual 48-Bit
Programmable Frequency word can let you get very accuate frequency. Please
contact ADI local office. |
[2002-12-19 11:49:48] |
| [问：dairlom
@163.com] |
在数据采集过程中，如何有效的防止干扰信号。谢谢。 |
| [答：Way
ne_Zhou] |
be carefule on grounding, signal routine, and sheltering. You can
refer to the design materials at below
website: http://www.analog.com/technology/
amplifiersLinear/training/sensorSignal.html |
[2002-12-19 11:51:02] |
| [问：tyf313] |
目前DAC是否已经标准化？或有几种标准？标准化的D/A、A/D板到哪里可以买到？多少钱一块？谢谢！ |
| [答：Willia
m_Koon] |
There isn"t any standard for DAC. However, you can divide
DAC into several main categories such as single supply, bipolar output,
etc. Analog Devices is the leading supplier of high performance
A/D D/A products but there is no standard PCB. Please contact
our sales office if you are interested in further information. |
[2002-12-19 11:51:47] |
| [问：huaj
l_P6HF1] |
DAC处理时,有效提高抗干扰能力的方法有哪些? |
| [答：Way
ne_Zhou] |
Proper PCB layout, including grounding, power supply de-coupling,
sheltering. Details please refer to:
http://www.analog.com/technology/
amplifiersLinear/training/sensorSignal.html |
[2002-12-19 11:53:21] |
| [问：huaj
l_P6HF1] |
请谈谈DAC变换中常用的算法实现 |
| [答：Liao_W
en_Shuai] |
Refer to page 6 of the presentation, please. |
[2002-12-19 11:56:10] |
| [问：lingf] |
DAC8562的速度是12微秒，能否用在要求10k范围的应用中？或者有其他芯片来替代？ |
| [答：
Albert_O] |
Update rate is determined by the settling time and the interface write
time. Requirement is for 10Khz update.Settling time of DAC8562 is
16us.Interface time requires a min data setup time of 30ns and hold
time of 10ns.Therefore the interface write time can be adjusted to
achieve 10kHz update.To recommend an alternative is difficult not
knowing the application and application requirements. AD5340/41 are
parallel interface 12 bit DACs but do not inbclude a reference and will
not have the accuracy of the DAC8562 but have the interface speed and can
be controlled to give a 10Khz throughput
rate. |
[2002-12-19 11:56:53] |
| [问：
zhonjia] |
如何有效的控制采样精度？（针对低频离散信号） |
| [答：
Eagle] |
First use an good ampplifer (AD8610 Low Input Bias CurrentWide
Bandwidth JFET Operational Amplifiers, AD8551 Zero-Drift, Single-Supply,
Rail-to-Rail Input/Output Operational Amplifiers or use general such as
OP1177) to gain up you signal, then use an good ADC (AD7679 is 18bit
800KSPS SAR ADC, AD7675 is 16 bit SAR 100KSPS). use SAR ADC because it has
no delay .Do not use sigma-delta ADC because it has delay. |
[2002-12-19 12:00:13] |
| [问：
cheng z] |
主持人及各位佳宾好：当DAC用做电位器时与专用的数字电位器相比有什么优点，以及它们各有什么优缺点？3。3伏工作电压的DAC有什么有什么型号的产品？ |
| [答：
Eric_Liu] |
output voltage lower than Vref in DAC, But Digital POT can output
higher voltage.digital POT have wide dynamic input,nonvolatile
memory,poweron midscale preset etc.And DAC have high
resolutions(>10bit).ADI have many 3.3V supply DAC,like
AD543x,AD532x,AD580x. More parts Pls. find at www.analog.com |
[2002-12-19 12:02:37] |
| [问：mk] |
在ADV7123中, RSET 這支 pin 一定要接 530 歐姆的電阻嗎?
若接其他電阻值, 如470 or 600 歐姆, 會有什麼問題嗎? 又adv7123的output可以直接接到負載電阻上而不須加buffer
op嗎? |
| [答：Charl
es_Lee] |
The external resistor just provide the internal R-C reset circuits
use. Please follow the value on ADV7123 data sheet. ADV7123 can drive 37.5
Ohm directly without any buffer. |
[2002-12-19 12:02:48] |
| [问：philhar
liu@yahoo.
com.cn] |
如何解决数模转换器的功耗问题 |
| [答：Way
ne_Zhou] |
it depends on DAC architecture itself. |
[2002-12-19 12:04:51] |
| [问：jichang
peng] |
数模转换器(DAC)是不是转换速度越高越好？ |
| [答：Way
ne_Zhou] |
Surely, but you need to consider other specs like resolution, DNL,
INL, offset. Proper choice is better. |
[2002-12-19 12:06:08] |
| [问：ljp] |
DAC和ADC配合使用，选择DAC有什么要注意的地方？ |
| [答：Liao_W
en_Shuai] |
When you select the DAC, please decide which SNR, SFDR, INL, DNL you
will be used. When you use it with ADC, just make sure that the clock for
the ADC can meet the requirement of DAC. If the same clock is used, make
sure the clock source can drive them together. |
[2002-12-19 12:07:03] |
| [问：
317576] |
如选用价廉、性能好的方案，考虑到体积时，有没有ADC与DAC合在单芯片上的方案，推荐一下！ |
| [答：Charl
es_Lee] |
AD73311L, AD73322L are the good candidates |
[2002-12-19 12:07:21] |
| [问：little
.daniel] |
能否 介绍一下四相限型DAC |
| [答：
Eagle] |
AD5424/AD5433/AD5445 8/10/12 Bit Versions Single and Dual Channels Low
Power (1uA max), 2.5V to 5.5V> 10MHz Multiplying Bandwidth
Temperature Range –40oC to 125oC 4 Quadrant Multiplying : +/-10VSerial
Interface SPI, QSPI, MICROWIRE, & DSP CompatibleParallel
Interface |
[2002-12-19 12:07:53] |
| [问：tao
jun8888] |
DAC的转换速率与传感器速率的关系？ |
| [答：Way
ne_Zhou] |
If you"re using sensor, you need to use ADC with higher speed, at
least meet Nyquist theory. (DAC, if on the return loop, then it"s the same
story). |
[2002-12-19 12:09:06] |
| [问：
heng z] |
当用DAC做分压器使用时与DIGITAL
POT相比有什么差异？谢谢 |
| [答：
Eric_Liu] |
DAC have high resolutions,but low voltage for Vref.Digital POT
have wide dynamic input(positive,negative voltage),more features for easy
use like power on midscale,nonvolative memory etc. |
[2002-12-19 12:09:36] |
| [问：mk] |
請問DAC的輸出若有glitch, 對系統會有何影響? 該如何降低DAC output的
glitch? |
| [答：Davi
d_Carr] |
Glitch is typically not a problem in frequency domain applications
like signal generation. This is because the glitch tends to contain
high-frequency energy that is outside of the desired frequency band.
For video applications glitch can be a problem, because it shows
up in the display. In this case a sample and hold (SHA) can be used to
deglitch the output. |
[2002-12-19 12:12:36] |
| [问：pan88
168@cn
nb.net] |
请问能否介绍一些好用的DAC
IC,最好是成本低的IC哦,我现在在找! |
| [答：Charl
es_Lee] |
AD5300(8bits), AD5310(10 bits), AD5320(12 bits). |
[2002-12-19 12:13:58] |
| [问：ljp] |
平滑滤波器的带宽如何依照取样频率来选取？比如取样为30MSPS。 |
| [答：Willia
m_Koon] |
Anti-aliasing filter should be designed with the system bandwidth in
mind. Sampling rate determines the maximum bandwidth of the
system. For example, 30MSPS band limits the system to
15MHz. So the anti-aliasing filter should be designed with
corner no larger than 15MHz. In practical system, you should
leave some headroom (~15%). For 30MSPS, you should use max
bandwidth no larger than around 12MHz. |
[2002-12-19 12:15:26] |
| [问：
chengky] |
dac中的性能主要由那些参数决定 |
| [答：Charl
es_Lee] |
INL, DNL, SNR (or SFDR), maximum output swing and power consumption
..etc. |
[2002-12-19 12:15:33] |
| [问：bxr20
08@16
3.com] |
请问：如何补偿DAC的温度漂移？ |
| [答：Charl
es_Lee] |
Use low temperature drift external voltage reference such as ADR4xx
family. |
[2002-12-19 12:16:29] |
| [问：mars
zhang] |
在audio的Sigma-Delta
DAC中用什么结构能减小还原滤波器电容大小比例？谢谢。 |
| [答：Way
ne_Zhou] |
Oversampling can help to relax the request on the filter or the
capacitors at the DAC output. |
[2002-12-19 12:17:07] |
| [问：xiao
gaoqing] |
请问ADI的DAC与同类产品相比有哪种优势 |
| [答：Willia
m_Koon] |
We have the largest selection of DAC"s available among all
manufacturers. Our wide selection ensures that you can find the
DAC suitable for your application. In general, we provide the
best accuracy and highest speed DAC available. |
[2002-12-19 12:17:43] |
| [问：l26
3038] |
DAC在光通信中如何运用？是否要增加其它对应的模块？ |
| [答：
Eagle] |
You can use AD5325 (2.5 V to 5.5 V, 2-Wire InterfaceQuad Voltage
Output 12-Bit DACs) or AD5326 in optical. You can also use ADuC831 (8ch
12bit ADC + 2 ch 12bit DAC +8052MCU + 62k Flash memory), ADuC814. If you
use ADN2841 (Dual-Loop 50 Mbps–2.7 Gbps Laser Diode Driver) with ADuC831,
then not other module needed. |
[2002-12-19 12:18:01] |
| [问：ljp] |
要把模拟信号复原，如何选取DAC？ |
| [答：Charl
es_Lee] |
It"s dependent on what"s the accuracy you want to reach. So, this will
lead you to decide the resolution of the DACs. If you have more questions
in specifics, please contact our local office. |
[2002-12-19 12:22:11] |
| [问：
cheng z] |
能否谈一下DAC做电子分压器的使用方法？谢谢 |
| [答：Willia
m_Koon] |
We have a separate line of Digital Potentiometers (DigiPOT) which are
basically derived off from DAC technology. DigiPOT however
offers more "special" functions. For example, there is "set and
forget" type of DigitPOT which has incorporated One Time Programmable
function. So DigiPOT is more appropriate that trying to use
DAC. |
[2002-12-19 12:22:49] |
| [问：
cheng z] |
在光纤通讯模块中，即可以采用DIGITAL POT
也可以采用DAC去控制调制电流和偏置电流，请问它们有什么不同？谢谢 |
| [答：
Eric_Liu] |
DAC have higher resolutions,can adjust output more exact.But
digital POT have wide dynamic input,more features for easy use. |
[2002-12-19 12:23:45] |
| [问：ecnanjing_EBY7E] |
在应用AD9856AST进行调制时，我用了不同批次的产品，同样的数据输入输出模拟电平相差3dB之多，为何？ |
| [答：Eagle] |
This is because the typical output current is 10 mA, but min is 5 mA,
max 20 mA. This will cause you see difference in output power level.
Please use AD8323 (5 V CATV Line Driver Fine Step Output Power Control,
Gain Programmable in 0.75 dB Steps Over a 53.5 dB Range) to adjust. If you
do not use VGA, please use oupput scale adjust function if you use AD9857.
Or you can add power level adjust circuit. |
[2002-12-19 12:26:42] |
| [问：gzg_19
7707157] |
贵公司哪些产品系列和Ti公司的DSP芯片的SPI串行接口兼容，谢谢 |
| [答：Way
ne_Zhou] |
We"ve many parts with SPI interface, including DAC like
AD5530/5531/5517/8300/7390/53xx...... And it"s compatible with ADI DSP
like ADSP218x/219x/21xxx/21535/21532. |
[2002-12-19 12:26:47] |
| [问：samire] |
时钟的抖动对DAC的噪音和失真的影响。对12位DAC，时钟的抖动的最低要求是多少？ |
| [答：
Albert_O] |
As a general rule in achieving an effective resolution of 12 bits the
jitter in an ADC or DAC system needs to be less than 1ps for a fullscale
sinewave of 30MHz and better than 10ps for a 3MHz signal. |
[2002-12-19 12:27:07] |
| [问：bxr20
08@16
3.com] |
ADI 10位 DAC 最高工作频率为多少？ 是何型号？ |
| [答：Charl
es_Lee] |
AD9751 300MHz or ADV7127 240MHz. |
[2002-12-19 12:27:34] |
| [问：boa] |
How to get reference voltage? From outchip
or inchip circuits? |
| [答：
Eagle] |
You can use REF195 or ADR421 reference voltage chip as the external
voltage reference. If the DAC has an reference inside and have an output
pin, you can buffer it and use for other circuits. |
[2002-12-19 12:28:21] |
| [问：
daisw] |
贵公司有否将视频信号转换为数字信号的AD芯片？ |
| [答：Charl
es_Lee] |
ADV7183/85, AD9883A/2/87/88. |
[2002-12-19 12:28:49] |
| [问：
wbquan] |
数模转换器适用于什么范围,有什么要求? |
| [答：Liao_W
en_Shuai] |
Just like its name, it is used in the application that will have to
convert from digital to analog.The requirement incluse INL,DNL,
SNR, SFDR and so on. |
[2002-12-19 12:30:31] |
| [问：
gddgdls] |
請提供貴公司在深圳的代理商的聯絡方式,OK? |
| [答：
Eric_Liu] |
Chiantronic(华创）0755-83781886excelpoint 83640166arrow
83592920future 82090239wpg 83580555 |
[2002-12-19 12:31:42] |
| [问：
JJ63901] |
What"s the difference in the input type of
Single-ended and Differential? Thank you! |
| [答：Davi
d_Carr] |
Our high-speed DACs have two complementary outputs. One output (IA)
increases from zero current to full-scale current as the digital code
increases from all zeroes to all ones. The other output (IB) cecreases in
current from full-scale current to zero current as the digital code
increases from all zeroes to all ones. Single-ended output means
that only one output (IA or IB) is converted to a voltage and used in the
circuit. Differential output means that both outputs are used. Usually the
outputs are subtracted so that the signals add (since they are
complementary). This can be dsone with a transformer or differential
amplifier.Refer to page 14 of the AD9754 datasheet for more detail
on
this.http://www.analog.com/UploadedFiles/
Datasheets/1219275AD9754_a.pdf |
[2002-12-19 12:33:53] |
| [问：
gybbh] |
贵公司最快的DAC和ADC有多快？几位？哪一款？ |
| [答：Liao_W
en_Shuai] |
The fastest ADC can be AD6645 with the 105MSPS 14b resolution. We will
provide the 1GSPS ADC soon.The fastest DAC is 400MSPS 16bit
resolution. |
[2002-12-19 12:34:21] |
| [问：bby] |
多通道dac地线处理以及非线性误差处理如何实现? |
| [答：Liao_W
en_Shuai] |
Just use a large area ground in your board, then connect the digital
ground and analog ground together in one point.For the nonlinear
errors, you cannot process it. It is decided by the DAC itself. Maybe you
can consider calibrate in your system to diminish it. |
[2002-12-19 12:37:26] |
| [问：huang
xq26] |
贵公司的D／A转换器中，输出0－5V，并行接口，仅＋5V 或 ＋3.3V
供电（无需＋12V），内含基准源的产品型号是什么？ |
| [答：Way
ne_Zhou] |
you can try AD7801, or you can try current output DAC. |
[2002-12-19 12:38:37] |
| 非在线问答 |
| [问：] |
AD9754的建立时间大约为多少？ |
| [答：] |
The set up time for the digital input is 2.5 nS (minimal).
The output rise time is 2.5 nS, and the settling time is 35nS. |
| [问：] |
怎么提高D／A转换器的一致性？在电路中，我们希望不再使用模拟调节的方式。 |
| [答：] |
I don't know whether you refer to the monotonicity. If yes,
then you should select the DAC within 1LSB DNL, the problem will be solved.
If you refer to the gain of the amplifier, then use the precision resistors
and digi-POT to adjust it. |
| [问：] |
１．一般的數模轉換器在不加運放與電壓滿足情況下，可否驅動變頻器或伺服驅動器？
２．怎樣才能獲得ADI公司器件光盤資料,若能像美信公司提供的那樣.
3.數模轉換器能否設計成單電壓供電,最好不要有負電壓. |
| [答：] |
1. This is decided by the current limit of the DAC and the
motor. Normally, we recommend you add a amplifier to drive the motor if its
drive current is large. 2. It is very easy for you to get the CD-R of ADI
now. Just send mail to china.support@analog.com or call the toll-free number
800 810 1742. We will send the CD-R to you in one week. If you encounter any
problem or want to make decision on chip selection, you can also send mail
or call the number. ADI will be very glad to help our customers. 3. We have
a lot of single supply DACs with different resolutions. If you need this
information, send mail to china.support@analog.com, or call toll-free number
800 810 1742, please. |
| [问：] |
ADI公司的D/A转换器有哪些封装形式？ |
| [答：] |
We provide DACs with different packages. There are
different DIP packages and surface mount packages. We also have a lot of
packages with small size, SOT-23, uSOIC, LFCSP for example. If you need, we
can help you select the DAC with the required package. |
| [问：] |
请问采用并行A/D采样的数值,如何通过串行PWM方式还原成模拟信号?之间有什么算式关系? |
| [答：] |
PWM will generate the output according to the duty cycle.
So you should convert the digital input into duty cycle. Make out which duty
cycle is the maxium output (DCmax), which is minimal output (DCmin), the
resolution of the ADC is N bit, the value is D, then the duty cycle with the
expected output will be:D*(DCmax-DCmin)/2expN. |
| [问：] |
我想问个问题，如何选择ADI器件,与其对应硬件有何要求? |
| [答：] |
It is the same to other vendors, you should select your
parts according to the requirement of your system. If you can tell us your
requirement, then send mail to china.support@analog.com or call 800 810
1742, we will give you some advice. |
| [问：] |
ADI DAC 最高工作频率为多少？ 是何型号？ |
| [答：] |
The DAC with 12-bit resolution and 1GSPS is under design in
ADI now. |
| [问：] |
能否得到你们公司关于ad/da的数据资料? |
| [答：] |
Surely, you can get our datasheets. The first and fastest
way is to send mail to china.support@analog.com to ask for it. We will send
it to you in one week. But make sure to provide is with your correct address
and post code. The second way is to go to our website. The third way is to
take part in the internal IC exhibition, to the ADI booth, then you can get
it. A toll-free number is set up in Beijing, just call them and let them
send it to you. |
| [问：] |
平滑滤波器的指标对平滑后的模拟信号有何影响？那个指标影响最大？ |
| [答：] |
Whether the filter you mentioned is the low pass filter
after the DAC? If yes, it will influence both the static performance and the
dynamic performance. As to which it will be influenced most depends on the
design of the filter. So it is also important to select the proper amplifier
and design the filter after the DAC. |
| [问：] |
请问在设计高速数模电路时，应注意什么问题? |
| [答：] |
For high speed DAC, you have to take care of the grounding,
power supply, EMI/RFI and shielding. The layout and the wire in the board
should be taken care, too. ADI has a very good reference material for you.
You can find it from
http://www.analog.com/technology/amplifiersLinear/
training/highspeed.html
If you are not convenient to access the internet, send mail to china.support@analog.com,
please. We will be very glad to provide you the material. Or call 800 810
1742 to talk with our engineers in this topic. |
| [问：] |
请介绍一下RAM DAC！ |
| [答：] |
Whether the RAM DAC you mentioned is the digital
potentionmeter with memory? If yes, refer to page 23 of the presentation.
Also, you are invited to attend the seminar on Jan. 14th, 2003. It will give
you basic information for the digital potentionmeter. |
| [问：] |
5300采样四路如何计算ＰＩＣ74b所需的时钟, |
| [答：] |
I am sorry that I can not understand what's your are asking
about. Please contact ADI local office or email to china.support@analog.com |
| [问：] |
在实时控制系统中，多个模拟量如何共享一片VFC模数转换器？ |
| [答：] |
You can use ADG706/7 (CMOS, 2.5 Ohm Low-Voltage
8-/16-Channel Multiplexers) to switch form different source and then use
ADVFC32 to convert to frequency, then count by MCU or DSP such as ADuC832 or
ADSP-2191. |
| [问：] |
我想要分辨率为16位，抽样频率为10MHZ(至少4MHZ)的ADC芯片，并想了解它的工作原理和内部结构图，不知那个公司有？谢谢 |
| [答：] |
ADI have AD6644 (65M 14bit ADC) and use 4x oversampling.
According to processing you can get, it can achieve 16bit. You can use
AD6620 for the digital down converter. AD6620 has digital filter and have
decimate function. You can get 4MHz output form 60MHz sample rate. AD6652/4
has ADC and downconverter in one chip, it can do you job too. |
| [问：] |
转换速率和抽样频率有什么区别和联系？我们在介绍ADC的性能指标时怎样由转换速率得知抽样频率（或相反）？ |
| [答：] |
It is the same for the SAR type and pipe line type ADC. For
the Sigma-Delta type ADC, the sample clock rate is much high than the out
put data rate because it is based on oversampling. |
| [问：] |
如果需要高速的DA变换，但是FPGA只有用LVDS送高速的数字信号，现在能
买到直接接口的大DA变换器，如果没有那么设计的时候如何考虑电源的供电
问题？ 谢谢 |
| [答：] |
ADI will develop AD922x fimilar LVDS output type ADC (4
indenpend 8, 10 or 12 bit in one chip). For the DAC, ADI has many TXDAC such
as AD9777(16-Bit, 160 MSPS 2 /4 /8 Interpolating Dual TxDAC+ D/A Converter),
AD9772A(14-Bit, 160 MSPS TxDAC+®
with 2 Interpolation Filter). It can use a relatively low datarate and
interpolating to an very high speed, so no LVDS interface needed. You can
use AD6623(4-Channel, 104 MSPS Digital Transmit Signal Processor) to
upconverter form baseband data stream to IF data stream. |
| [问：] |
要做一個由音頻信號轉化為數字信號的電路應該用什麼樣的模塊? |
| [答：] |
You can use AD73322 (Low Cost, Low Power CMOS General
Purpose Dual Analog Front End, Two 16-Bit A/D Converters
Two 16-Bit D/A Converters) to be use with ADSP-21065 for normal case, you
can use AD1980(6 channel CODEC) for PC mother board, you can use AD1836
(high-performance single-chip codec providing three stereo DACs and two
stereo ADCs, ADCs: –92 dB THD + N, 105 dB SNR and Dynamic Range) for high
end application such as prefession AUDIO. |
| [问：] |
请说说当前制约转换精度的主要因素是什么? |
| [答：] |
Many, mostly because of chip technic and process. |
| [问：] |
请问有关数模转换器(DAC)的发展前景，会否被另一种技术所代替？ |
| [答：] |
No. |
| [问：] |
请问内带内插器的da有什么好处，在什么情况下选用？ |
| [答：] |
First, you can use an lower data rate stream to get an high
data rate stream, for example, AD9777 is and 16-Bit, 160 MSPS 2 /4 /8
Interpolating Dual TxDAC+® D/A Converter, it can gernerate 160M data rate
with only 20M data rate input, thus lower the burden of DSP or digital up
converter. When you have an high data rate and an high DAC clock rate, you
can get all the benifit similar as an over sampling ADC. You can get good
SFDR and let you low pass filter much easier to design. |
| [问：] |
用于音频的Sigma-delta A/D D/A同采用R-2R网络原理工作的A/D
D/A有什么区别？ |
| [答：] |
Sigma delta A/Ds D/As provide much high resolution
(>16bits) than the resistor network A/Ds D/As. But its speed is vey slow
(<1MHz maximum, normal case, it is <200KHz). Resistor network type ADC (or
you called it flash type ADC) and R-2R DAC are much higher speed (normally,
over 5MHz) but the resolution is low (normally lower than 10bits) |
| [问：] |
你好，我是一名软件工程师，对ADC领域来说，基本上是一个门外汉，但是在软件开发的过程中，经常牵涉到AD模块和数字I/O的集成，我想了解一下贵公司在提供软件开发用户产品方面有一些什么样的经验？对不同用户集成硬件方面有一些什么样的考虑？ |
| [答：] |
Yes, please contact our local office that we can help you
on this. |
| [问：] |
Glad to see you!I have a problem that how to
control the pricision of D/A conversion,and the ways to do it. |
| [答：] |
First of all, you need very high accuracy voltage reference
for the DAC. And, the control signal should be noise free or very low
jitter. All of the timing you have to follow the data sheet. If you like,
please refer to the AD5542 data sheet for more details. If you still have
any questions please contact our local offce. |
| [问：] |
请介绍一下Sigma-Delta DAC的结构和性能 |
| [答：] |
The Sigma-Delta DAC architecture needs to expalin on the
phone for more details. Please contact our local office. For its
characteristics, it's used on the high resolution(normally more than 16
bits) but low speed (usually used on the audio band). |
| [问：] |
对于高精度的AD转换中,其电源要求要达到什么数量级,才能保证输出精度 |
| [答：] |
Normally, the power supply noise (ripple) should less than
few LSBs of the ADC to make sure the system noise. But the PCB layout also
influence this. |
| [问：] |
DAC的详细资料那里可以得到？ |
| [答：] |
Please contact our local office for more details. Or visit
our web site @ http://www.analog.com to downlod the data sheet |
| [问：] |
因为很多时候模拟输出也许要很多的通道，请问有没有多通道(>10)的10bit精度的DAC？ |
| [答：] |
Yes, AD5314/15/16/17, AD5335/36, AD5383(3V, parallel port),
AD7805(5V, parallel port) and AD7804. |
| [问：] |
能否举例使用 Sigma－Delta 技术的 AD 转换器型号？ |
| [答：] |
AD771x family, AD773x family and AD778x family. |
| [问：] |
数模转换产品有什么重要指标? |
| [答：] |
INL and DNL specifications are always used for the DACs
selection. Supply voltage, output swing, conversion rate and SFDR are other
concerns during the design. |
| [问：] |
如何降低噪音与干扰？ |
| [答：] |
Normally, you have to isolate the noise sources to coupling
to the analog sections. These included the parts placement, signal routing
and parts' layout. For more details please contact our local office. |
| [问：] |
请问贵公司的数模转换器工作方式是什么？ |
| [答：] |
We used most of the technologies we mentioned during the
seminar. Included voltage segment, string, R-2R, segmented R-2R, finite S/H
and current steering. |
| [问：] |
有没有总线数据输入方式的数模器件？ |
| [答：] |
Yes, AD7801(8 bits),AD5330 (8bits), AD5331 (10bits),AD5340
(12bits) ..etc. |
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